2017-06-03 19:35:40 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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2007-01-13 13:06:52 +08:00
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; An integer truncation to i1 should be done with an and instruction to make
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2006-11-27 09:05:10 +08:00
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; sure only the LSBit survives. Test that this is the case both for a returned
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; value and as the operand of a branch.
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2016-02-19 02:44:33 +08:00
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; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s
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2006-12-31 14:02:00 +08:00
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2011-06-17 11:14:27 +08:00
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define zeroext i1 @test1(i32 %X) nounwind {
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2017-06-03 19:35:40 +08:00
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; CHECK-LABEL: test1:
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; CHECK: # BB#0:
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; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al
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; CHECK-NEXT: andb $1, %al
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; CHECK-NEXT: retl
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2007-01-13 13:06:52 +08:00
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%Y = trunc i32 %X to i1
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ret i1 %Y
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2006-11-27 09:05:10 +08:00
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}
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2010-02-27 15:36:59 +08:00
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define i1 @test2(i32 %val, i32 %mask) nounwind {
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2017-06-03 19:35:40 +08:00
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; CHECK-LABEL: test2:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: btl %ecx, %eax
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; CHECK-NEXT: jae .LBB1_2
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; CHECK-NEXT: # BB#1: # %ret_true
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; CHECK-NEXT: movb $1, %al
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; CHECK-NEXT: retl
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; CHECK-NEXT: .LBB1_2: # %ret_false
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: retl
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2006-11-27 09:05:10 +08:00
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entry:
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2007-02-02 10:16:23 +08:00
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%shifted = ashr i32 %val, %mask
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2006-12-31 14:02:00 +08:00
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%anded = and i32 %shifted, 1
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2007-01-13 13:06:52 +08:00
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%trunced = trunc i32 %anded to i1
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br i1 %trunced, label %ret_true, label %ret_false
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2006-11-27 09:05:10 +08:00
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ret_true:
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2007-01-13 13:06:52 +08:00
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ret i1 true
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2006-11-27 09:05:10 +08:00
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ret_false:
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2007-01-13 13:06:52 +08:00
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ret i1 false
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2006-11-27 09:05:10 +08:00
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}
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2010-02-27 15:36:59 +08:00
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define i32 @test3(i8* %ptr) nounwind {
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2017-06-03 19:35:40 +08:00
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; CHECK-LABEL: test3:
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; CHECK: # BB#0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: testb $1, (%eax)
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; CHECK-NEXT: je .LBB2_2
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; CHECK-NEXT: # BB#1: # %cond_true
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; CHECK-NEXT: movl $21, %eax
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; CHECK-NEXT: retl
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; CHECK-NEXT: .LBB2_2: # %cond_false
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retl
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2015-02-28 05:17:42 +08:00
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%val = load i8, i8* %ptr
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2007-01-13 13:06:52 +08:00
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%tmp = trunc i8 %val to i1
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br i1 %tmp, label %cond_true, label %cond_false
|
2006-11-27 09:05:10 +08:00
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cond_true:
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2006-12-31 14:02:00 +08:00
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ret i32 21
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2006-11-27 09:05:10 +08:00
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cond_false:
|
2006-12-31 14:02:00 +08:00
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ret i32 42
|
2006-11-27 09:05:10 +08:00
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}
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2006-11-28 03:54:23 +08:00
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2010-02-27 15:36:59 +08:00
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define i32 @test4(i8* %ptr) nounwind {
|
2017-06-03 19:35:40 +08:00
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; CHECK-LABEL: test4:
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; CHECK: # BB#0:
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; CHECK-NEXT: testb $1, {{[0-9]+}}(%esp)
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; CHECK-NEXT: je .LBB3_2
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; CHECK-NEXT: # BB#1: # %cond_true
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; CHECK-NEXT: movl $21, %eax
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; CHECK-NEXT: retl
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; CHECK-NEXT: .LBB3_2: # %cond_false
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retl
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2007-01-13 13:06:52 +08:00
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%tmp = ptrtoint i8* %ptr to i1
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br i1 %tmp, label %cond_true, label %cond_false
|
2006-11-28 03:54:23 +08:00
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cond_true:
|
2006-12-31 14:02:00 +08:00
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ret i32 21
|
2006-11-28 03:54:23 +08:00
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cond_false:
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2006-12-31 14:02:00 +08:00
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ret i32 42
|
2006-11-28 03:54:23 +08:00
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}
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|
2010-02-27 15:36:59 +08:00
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define i32 @test5(double %d) nounwind {
|
2017-06-03 19:35:40 +08:00
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; CHECK-LABEL: test5:
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; CHECK: # BB#0:
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; CHECK-NEXT: pushl %eax
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; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
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; CHECK-NEXT: fnstcw (%esp)
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; CHECK-NEXT: movzwl (%esp), %eax
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; CHECK-NEXT: movw $3199, (%esp) # imm = 0xC7F
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; CHECK-NEXT: fldcw (%esp)
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; CHECK-NEXT: movw %ax, (%esp)
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; CHECK-NEXT: fistps {{[0-9]+}}(%esp)
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; CHECK-NEXT: fldcw (%esp)
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; CHECK-NEXT: testb $1, {{[0-9]+}}(%esp)
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; CHECK-NEXT: je .LBB4_2
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; CHECK-NEXT: # BB#1: # %cond_true
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; CHECK-NEXT: movl $21, %eax
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; CHECK-NEXT: popl %ecx
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; CHECK-NEXT: retl
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; CHECK-NEXT: .LBB4_2: # %cond_false
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: popl %ecx
|
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|
; CHECK-NEXT: retl
|
2007-01-13 13:06:52 +08:00
|
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|
%tmp = fptosi double %d to i1
|
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br i1 %tmp, label %cond_true, label %cond_false
|
2006-11-28 03:54:23 +08:00
|
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|
cond_true:
|
2006-12-31 14:02:00 +08:00
|
|
|
ret i32 21
|
2006-11-28 03:54:23 +08:00
|
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|
cond_false:
|
2006-12-31 14:02:00 +08:00
|
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|
ret i32 42
|
2006-11-28 03:54:23 +08:00
|
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|
}
|