2013-03-13 00:27:52 +08:00
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; REQUIRES: asserts
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[CodeGenPrep] Skip merging empty case blocks
This is recommit of r287553 after fixing the invalid loop info after eliminating an empty block and unit test failures in AVR and WebAssembly :
Summary: Merging an empty case block into the header block of switch could cause ISel to add COPY instructions in the header of switch, instead of the case block, if the case block is used as an incoming block of a PHI. This could potentially increase dynamic instructions, especially when the switch is in a loop. I added a test case which was reduced from the benchmark I was targetting.
Reviewers: t.p.northover, mcrosier, manmanren, wmi, joerg, davidxl
Subscribers: joerg, qcolombet, danielcdh, hfinkel, mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D22696
llvm-svn: 289988
2016-12-17 04:38:39 +08:00
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; RUN: llc < %s -disable-preheader-prot=true -march=x86 -stats 2>&1 | grep "Number of blocks eliminated" | grep 3
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; RUN: llc < %s -disable-preheader-prot=true -march=x86 -stats -cgp-freq-ratio-to-skip-merge=10 2>&1 | grep "Number of blocks eliminated" | grep 6
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2016-04-05 22:06:20 +08:00
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; RUN: llc < %s -disable-preheader-prot=false -march=x86 -stats 2>&1 | grep "Number of blocks eliminated" | grep 3
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2007-04-02 09:32:59 +08:00
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; PR1296
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
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target triple = "i686-apple-darwin8"
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2010-08-18 06:35:20 +08:00
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define i32 @foo(i32 %A, i32 %B, i32 %C) nounwind {
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2007-04-02 09:32:59 +08:00
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entry:
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switch i32 %A, label %out [
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i32 1, label %bb
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i32 0, label %bb13
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i32 2, label %bb35
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]
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bb: ; preds = %cond_next, %entry
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%i.144.1 = phi i32 [ 0, %entry ], [ %tmp7, %cond_next ] ; <i32> [#uses=2]
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%tmp4 = and i32 %i.144.1, %B ; <i32> [#uses=1]
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icmp eq i32 %tmp4, 0 ; <i1>:0 [#uses=1]
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br i1 %0, label %cond_next, label %out
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cond_next: ; preds = %bb
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%tmp7 = add i32 %i.144.1, 1 ; <i32> [#uses=2]
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icmp slt i32 %tmp7, 1000 ; <i1>:1 [#uses=1]
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br i1 %1, label %bb, label %out
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bb13: ; preds = %cond_next18, %entry
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%i.248.1 = phi i32 [ 0, %entry ], [ %tmp20, %cond_next18 ] ; <i32> [#uses=2]
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%tmp16 = and i32 %i.248.1, %C ; <i32> [#uses=1]
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icmp eq i32 %tmp16, 0 ; <i1>:2 [#uses=1]
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br i1 %2, label %cond_next18, label %out
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cond_next18: ; preds = %bb13
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%tmp20 = add i32 %i.248.1, 1 ; <i32> [#uses=2]
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icmp slt i32 %tmp20, 1000 ; <i1>:3 [#uses=1]
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br i1 %3, label %bb13, label %out
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bb27: ; preds = %bb35
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%tmp30 = and i32 %i.3, %C ; <i32> [#uses=1]
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icmp eq i32 %tmp30, 0 ; <i1>:4 [#uses=1]
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br i1 %4, label %cond_next32, label %out
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cond_next32: ; preds = %bb27
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%indvar.next = add i32 %i.3, 1 ; <i32> [#uses=1]
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br label %bb35
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bb35: ; preds = %entry, %cond_next32
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%i.3 = phi i32 [ %indvar.next, %cond_next32 ], [ 0, %entry ] ; <i32> [#uses=3]
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icmp slt i32 %i.3, 1000 ; <i1>:5 [#uses=1]
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br i1 %5, label %bb27, label %out
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out: ; preds = %bb27, %bb35, %bb13, %cond_next18, %bb, %cond_next, %entry
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%result.0 = phi i32 [ 0, %entry ], [ 1, %bb ], [ 0, %cond_next ], [ 1, %bb13 ], [ 0, %cond_next18 ], [ 1, %bb27 ], [ 0, %bb35 ] ; <i32> [#uses=1]
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ret i32 %result.0
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}
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