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llvm-project/clang/test/Preprocessor/arm-acle-6.5.c

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Implement ACLE 2.0 macros of chapters 6.4 and 6.5 for [ARM] and [Aarch64] targets. Differential Revision: http://reviews.llvm.org/D12244 Change-Id: Iffd4e822c15e18668fe8868278230ff232ef50aa llvm-svn: 246768
2015-09-03 22:40:57 +08:00
// RUN: %clang -target arm-eabi -mfpu=none -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-FP
// RUN: %clang -target armv4-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-FP
// RUN: %clang -target armv5-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-FP
// RUN: %clang -target armv6m-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-FP
// RUN: %clang -target armv7r-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-FP
// RUN: %clang -target armv7m-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-FP
Basic: add support for ARM ACLE 6.5.1 Extend ARM ACLE support (Section 6.5.1) for AArch32. Define __ARM_FP if hardware floating point support is available as per the value defined by the ACLE. llvm-svn: 217957
2014-09-17 22:50:27 +08:00
Implement ACLE 2.0 macros of chapters 6.4 and 6.5 for [ARM] and [Aarch64] targets. Differential Revision: http://reviews.llvm.org/D12244 Change-Id: Iffd4e822c15e18668fe8868278230ff232ef50aa llvm-svn: 246768
2015-09-03 22:40:57 +08:00
// CHECK-NO-FP-NOT: __ARM_FP 0x{{.*}}
Fix __ARM_FP value for sp-only FPUs with Half-precision The logic for parsing FP capabilities to set __ARM_FP was mistakenly removing the Half-Precision capability when handling fp-only-sp resulting in a value of 0x4. Section 6.5.1 of ACLE states that for such FP architectures the value should be 0x6 llvm-svn: 250888
2015-10-21 18:03:55 +08:00
// RUN: %clang -target arm-eabi -mfpu=vfpv3xd -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-ONLY
Implement ACLE 2.0 macros of chapters 6.4 and 6.5 for [ARM] and [Aarch64] targets. Differential Revision: http://reviews.llvm.org/D12244 Change-Id: Iffd4e822c15e18668fe8868278230ff232ef50aa llvm-svn: 246768
2015-09-03 22:40:57 +08:00
Fix __ARM_FP value for sp-only FPUs with Half-precision The logic for parsing FP capabilities to set __ARM_FP was mistakenly removing the Half-Precision capability when handling fp-only-sp resulting in a value of 0x4. Section 6.5.1 of ACLE states that for such FP architectures the value should be 0x6 llvm-svn: 250888
2015-10-21 18:03:55 +08:00
// CHECK-SP-ONLY: __ARM_FP 0x4
// RUN: %clang -target arm-eabi -mfpu=vfpv3xd-fp16 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-HP
// RUN: %clang -target arm-eabi -mfpu=fpv4-sp-d16 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-HP
// RUN: %clang -target arm-eabi -mfpu=fpv5-sp-d16 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-HP
// CHECK-SP-HP: __ARM_FP 0x6
Basic: add support for ARM ACLE 6.5.1 Extend ARM ACLE support (Section 6.5.1) for AArch32. Define __ARM_FP if hardware floating point support is available as per the value defined by the ACLE. llvm-svn: 217957
2014-09-17 22:50:27 +08:00
// RUN: %clang -target arm-eabi -mfpu=vfp -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP
Implement ACLE 2.0 macros of chapters 6.4 and 6.5 for [ARM] and [Aarch64] targets. Differential Revision: http://reviews.llvm.org/D12244 Change-Id: Iffd4e822c15e18668fe8868278230ff232ef50aa llvm-svn: 246768
2015-09-03 22:40:57 +08:00
// RUN: %clang -target arm-eabi -mfpu=vfpv2 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP
// RUN: %clang -target arm-eabi -mfpu=vfpv3 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP
Basic: add support for ARM ACLE 6.5.1 Extend ARM ACLE support (Section 6.5.1) for AArch32. Define __ARM_FP if hardware floating point support is available as per the value defined by the ACLE. llvm-svn: 217957
2014-09-17 22:50:27 +08:00
// RUN: %clang -target arm-eabi -mfpu=vfp3-d16 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP
// RUN: %clang -target arm-eabi -mfpu=neon -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP
Implement ACLE 2.0 macros of chapters 6.4 and 6.5 for [ARM] and [Aarch64] targets. Differential Revision: http://reviews.llvm.org/D12244 Change-Id: Iffd4e822c15e18668fe8868278230ff232ef50aa llvm-svn: 246768
2015-09-03 22:40:57 +08:00
// RUN: %clang -target armv6-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP
// RUN: %clang -target armv7a-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP
Add support for armv7ve flag in clang (PR31358). This is a followup change to add v7ve support to clang for gcc compatibility. Please see r294661. Patch by Manoj Gupta. Differential Revision: https://reviews.llvm.org/D29773 llvm-svn: 294662
2017-02-10 07:30:10 +08:00
// RUN: %clang -target armv7ve-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP
Basic: add support for ARM ACLE 6.5.1 Extend ARM ACLE support (Section 6.5.1) for AArch32. Define __ARM_FP if hardware floating point support is available as per the value defined by the ACLE. llvm-svn: 217957
2014-09-17 22:50:27 +08:00
Avoid int to string conversion in Twine or raw_ostream contexts. Some output changes from uppercase hex to lowercase hex, no other functionality change intended. llvm-svn: 321526
2017-12-29 00:58:54 +08:00
// CHECK-SP-DP: __ARM_FP 0xc
Basic: add support for ARM ACLE 6.5.1 Extend ARM ACLE support (Section 6.5.1) for AArch32. Define __ARM_FP if hardware floating point support is available as per the value defined by the ACLE. llvm-svn: 217957
2014-09-17 22:50:27 +08:00
Implement ACLE 2.0 macros of chapters 6.4 and 6.5 for [ARM] and [Aarch64] targets. Differential Revision: http://reviews.llvm.org/D12244 Change-Id: Iffd4e822c15e18668fe8868278230ff232ef50aa llvm-svn: 246768
2015-09-03 22:40:57 +08:00
// RUN: %clang -target arm-eabi -mfpu=vfpv3-fp16 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP-HP
// RUN: %clang -target arm-eabi -mfpu=vfpv3-d16-fp16 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP-HP
Basic: add support for ARM ACLE 6.5.1 Extend ARM ACLE support (Section 6.5.1) for AArch32. Define __ARM_FP if hardware floating point support is available as per the value defined by the ACLE. llvm-svn: 217957
2014-09-17 22:50:27 +08:00
// RUN: %clang -target arm-eabi -mfpu=vfpv4 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP-HP
// RUN: %clang -target arm-eabi -mfpu=vfpv4-d16 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP-HP
Implement ACLE 2.0 macros of chapters 6.4 and 6.5 for [ARM] and [Aarch64] targets. Differential Revision: http://reviews.llvm.org/D12244 Change-Id: Iffd4e822c15e18668fe8868278230ff232ef50aa llvm-svn: 246768
2015-09-03 22:40:57 +08:00
// RUN: %clang -target arm-eabi -mfpu=fpv5-d16 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP-HP
Basic: add support for ARM ACLE 6.5.1 Extend ARM ACLE support (Section 6.5.1) for AArch32. Define __ARM_FP if hardware floating point support is available as per the value defined by the ACLE. llvm-svn: 217957
2014-09-17 22:50:27 +08:00
// RUN: %clang -target arm-eabi -mfpu=fp-armv8 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP-HP
Implement ACLE 2.0 macros of chapters 6.4 and 6.5 for [ARM] and [Aarch64] targets. Differential Revision: http://reviews.llvm.org/D12244 Change-Id: Iffd4e822c15e18668fe8868278230ff232ef50aa llvm-svn: 246768
2015-09-03 22:40:57 +08:00
// RUN: %clang -target arm-eabi -mfpu=neon-fp16 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP-HP
// RUN: %clang -target arm-eabi -mfpu=neon-vfpv4 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP-HP
Basic: add support for ARM ACLE 6.5.1 Extend ARM ACLE support (Section 6.5.1) for AArch32. Define __ARM_FP if hardware floating point support is available as per the value defined by the ACLE. llvm-svn: 217957
2014-09-17 22:50:27 +08:00
// RUN: %clang -target arm-eabi -mfpu=neon-fp-armv8 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP-HP
// RUN: %clang -target arm-eabi -mfpu=crypto-neon-fp-armv8 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP-HP
// RUN: %clang -target armv8-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP-HP
Avoid int to string conversion in Twine or raw_ostream contexts. Some output changes from uppercase hex to lowercase hex, no other functionality change intended. llvm-svn: 321526
2017-12-29 00:58:54 +08:00
// CHECK-SP-DP-HP: __ARM_FP 0xe
Basic: add support for ARM ACLE 6.5.1 Extend ARM ACLE support (Section 6.5.1) for AArch32. Define __ARM_FP if hardware floating point support is available as per the value defined by the ACLE. llvm-svn: 217957
2014-09-17 22:50:27 +08:00
Implement ACLE 2.0 macros of chapters 6.4 and 6.5 for [ARM] and [Aarch64] targets. Differential Revision: http://reviews.llvm.org/D12244 Change-Id: Iffd4e822c15e18668fe8868278230ff232ef50aa llvm-svn: 246768
2015-09-03 22:40:57 +08:00
// RUN: %clang -target armv4-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-FMA
// RUN: %clang -target armv5-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-FMA
// RUN: %clang -target armv6-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-FMA
// RUN: %clang -target armv6m-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-FMA
// RUN: %clang -target armv7m-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-FMA
// CHECK-NO-FMA-NOT: __ARM_FEATURE_FMA
PR27216: Only define __ARM_FEATURE_FMA when the target has VFPv4 Summary: According to the ACLE spec, "__ARM_FEATURE_FMA is defined to 1 if the hardware floating-point architecture supports fused floating-point multiply-accumulate". This changes clang's behaviour from emitting this macro for v7-A and v7-R cores to only emitting it when the target has VFPv4 (and therefore support for the floating point multiply-accumulate instruction). Fixes PR27216 Reviewers: t.p.northover, rengolin Subscribers: aemerson, rengolin, cfe-commits Differential Revision: http://reviews.llvm.org/D18963 llvm-svn: 267869
2016-04-28 19:29:08 +08:00
// RUN: %clang -target armv7a-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-FMA
// RUN: %clang -target armv7a-eabi -mfpu=vfpv4 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-FMA
Add support for armv7ve flag in clang (PR31358). This is a followup change to add v7ve support to clang for gcc compatibility. Please see r294661. Patch by Manoj Gupta. Differential Revision: https://reviews.llvm.org/D29773 llvm-svn: 294662
2017-02-10 07:30:10 +08:00
// RUN: %clang -target armv7ve-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-FMA
// RUN: %clang -target armv7ve-eabi -mfpu=vfpv4 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-FMA
PR27216: Only define __ARM_FEATURE_FMA when the target has VFPv4 Summary: According to the ACLE spec, "__ARM_FEATURE_FMA is defined to 1 if the hardware floating-point architecture supports fused floating-point multiply-accumulate". This changes clang's behaviour from emitting this macro for v7-A and v7-R cores to only emitting it when the target has VFPv4 (and therefore support for the floating point multiply-accumulate instruction). Fixes PR27216 Reviewers: t.p.northover, rengolin Subscribers: aemerson, rengolin, cfe-commits Differential Revision: http://reviews.llvm.org/D18963 llvm-svn: 267869
2016-04-28 19:29:08 +08:00
// RUN: %clang -target armv7r-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-FMA
// RUN: %clang -target armv7r-eabi -mfpu=vfpv4 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-FMA
Implement ACLE 2.0 macros of chapters 6.4 and 6.5 for [ARM] and [Aarch64] targets. Differential Revision: http://reviews.llvm.org/D12244 Change-Id: Iffd4e822c15e18668fe8868278230ff232ef50aa llvm-svn: 246768
2015-09-03 22:40:57 +08:00
// RUN: %clang -target armv7em-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-FMA
[ARM] Fix bugs introduced by the fp64/d32 rework. Change D60691 caused some knock-on failures that weren't caught by the existing tests. Firstly, selecting a CPU that should have had a restricted FPU (e.g. `-mcpu=cortex-m4`, which should have 16 d-regs and no double precision) could give the unrestricted version, because `ARM::getFPUFeatures` returned a list of features including subtracted ones (here `-fp64`,`-d32`), but `ARMTargetInfo::initFeatureMap` threw away all the ones that didn't start with `+`. Secondly, the preprocessor macros didn't reliably match the actual compilation settings: for example, `-mfpu=softvfp` could still set `__ARM_FP` as if hardware FP was available, because the list of features on the cc1 command line would include things like `+vfp4`,`-vfp4d16` and clang didn't realise that one of those cancelled out the other. I've fixed both of these issues by rewriting `ARM::getFPUFeatures` so that it returns a list that enables every FP-related feature compatible with the selected FPU and disables every feature not compatible, which is more verbose but means clang doesn't have to understand the dependency relationships between the backend features. Meanwhile, `ARMTargetInfo::handleTargetFeatures` is testing for all the various forms of the FP feature names, so that it won't miss cases where it should have set `HW_FP` to feed into feature test macros. That in turn caused an ordering problem when handling `-mcpu=foo+bar` together with `-mfpu=something_that_turns_off_bar`. To fix that, I've arranged that the `+bar` suffixes on the end of `-mcpu` and `-march` cause feature names to be put into a separate vector which is concatenated after the output of `getFPUFeatures`. Another side effect of all this is to fix a bug where `clang -target armv8-eabi` by itself would fail to set `__ARM_FEATURE_FMA`, even though `armv8` (aka Arm v8-A) implies FP-Armv8 which has FMA. That was because `HW_FP` was being set to a value including only the `FPARMV8` bit, but that feature test macro was testing only the `VFP4FPU` bit. Now `HW_FP` ends up with all the bits set, so it gives the right answer. Changes to tests included in this patch: * `arm-target-features.c`: I had to change basically all the expected results. (The Cortex-M4 test in there should function as a regression test for the accidental double-precision bug.) * `arm-mfpu.c`, `armv8.1m.main.c`: switched to using `CHECK-DAG` everywhere so that those tests are no longer sensitive to the order of cc1 feature options on the command line. * `arm-acle-6.5.c`: been updated to expect the right answer to that FMA test. * `Preprocessor/arm-target-features.c`: added a regression test for the `mfpu=softvfp` issue. Reviewers: SjoerdMeijer, dmgreen, ostannard, samparker, JamesNagurne Reviewed By: ostannard Subscribers: srhines, javed.absar, kristof.beyls, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D62998 llvm-svn: 362791
2019-06-07 20:42:54 +08:00
// (armv8 defaults to fp-armv8 > vfpv4, so we *should* expect FMA unless we downgrade to pre-vfpv4)
// RUN: %clang -target armv8-eabi -mfpu=vfpv3 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-FMA
PR27216: Only define __ARM_FEATURE_FMA when the target has VFPv4 Summary: According to the ACLE spec, "__ARM_FEATURE_FMA is defined to 1 if the hardware floating-point architecture supports fused floating-point multiply-accumulate". This changes clang's behaviour from emitting this macro for v7-A and v7-R cores to only emitting it when the target has VFPv4 (and therefore support for the floating point multiply-accumulate instruction). Fixes PR27216 Reviewers: t.p.northover, rengolin Subscribers: aemerson, rengolin, cfe-commits Differential Revision: http://reviews.llvm.org/D18963 llvm-svn: 267869
2016-04-28 19:29:08 +08:00
// RUN: %clang -target armv8-eabi -mfpu=vfpv4 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-FMA
[ARM] Fix bugs introduced by the fp64/d32 rework. Change D60691 caused some knock-on failures that weren't caught by the existing tests. Firstly, selecting a CPU that should have had a restricted FPU (e.g. `-mcpu=cortex-m4`, which should have 16 d-regs and no double precision) could give the unrestricted version, because `ARM::getFPUFeatures` returned a list of features including subtracted ones (here `-fp64`,`-d32`), but `ARMTargetInfo::initFeatureMap` threw away all the ones that didn't start with `+`. Secondly, the preprocessor macros didn't reliably match the actual compilation settings: for example, `-mfpu=softvfp` could still set `__ARM_FP` as if hardware FP was available, because the list of features on the cc1 command line would include things like `+vfp4`,`-vfp4d16` and clang didn't realise that one of those cancelled out the other. I've fixed both of these issues by rewriting `ARM::getFPUFeatures` so that it returns a list that enables every FP-related feature compatible with the selected FPU and disables every feature not compatible, which is more verbose but means clang doesn't have to understand the dependency relationships between the backend features. Meanwhile, `ARMTargetInfo::handleTargetFeatures` is testing for all the various forms of the FP feature names, so that it won't miss cases where it should have set `HW_FP` to feed into feature test macros. That in turn caused an ordering problem when handling `-mcpu=foo+bar` together with `-mfpu=something_that_turns_off_bar`. To fix that, I've arranged that the `+bar` suffixes on the end of `-mcpu` and `-march` cause feature names to be put into a separate vector which is concatenated after the output of `getFPUFeatures`. Another side effect of all this is to fix a bug where `clang -target armv8-eabi` by itself would fail to set `__ARM_FEATURE_FMA`, even though `armv8` (aka Arm v8-A) implies FP-Armv8 which has FMA. That was because `HW_FP` was being set to a value including only the `FPARMV8` bit, but that feature test macro was testing only the `VFP4FPU` bit. Now `HW_FP` ends up with all the bits set, so it gives the right answer. Changes to tests included in this patch: * `arm-target-features.c`: I had to change basically all the expected results. (The Cortex-M4 test in there should function as a regression test for the accidental double-precision bug.) * `arm-mfpu.c`, `armv8.1m.main.c`: switched to using `CHECK-DAG` everywhere so that those tests are no longer sensitive to the order of cc1 feature options on the command line. * `arm-acle-6.5.c`: been updated to expect the right answer to that FMA test. * `Preprocessor/arm-target-features.c`: added a regression test for the `mfpu=softvfp` issue. Reviewers: SjoerdMeijer, dmgreen, ostannard, samparker, JamesNagurne Reviewed By: ostannard Subscribers: srhines, javed.absar, kristof.beyls, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D62998 llvm-svn: 362791
2019-06-07 20:42:54 +08:00
// RUN: %clang -target armv8-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-FMA
Implement ACLE 2.0 macros of chapters 6.4 and 6.5 for [ARM] and [Aarch64] targets. Differential Revision: http://reviews.llvm.org/D12244 Change-Id: Iffd4e822c15e18668fe8868278230ff232ef50aa llvm-svn: 246768
2015-09-03 22:40:57 +08:00
// CHECK-FMA: __ARM_FEATURE_FMA 1
// RUN: %clang -target armv4-eabi -mfpu=neon -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-NEON
// RUN: %clang -target armv5-eabi -mfpu=neon -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-NEON
// RUN: %clang -target armv6-eabi -mfpu=neon -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-NEON
// CHECK-NO-NEON-NOT: __ARM_NEON
// CHECK-NO-NEON-NOT: __ARM_NEON_FP 0x{{.*}}
// RUN: %clang -target armv7-eabi -mfpu=neon -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NEON-SP
// CHECK-NEON-SP: __ARM_NEON 1
// CHECK-NEON-SP: __ARM_NEON_FP 0x4
// RUN: %clang -target armv7-eabi -mfpu=neon-fp16 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NEON-SP-HP
// RUN: %clang -target armv7-eabi -mfpu=neon-vfpv4 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NEON-SP-HP
// RUN: %clang -target armv7-eabi -mfpu=neon-fp-armv8 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NEON-SP-HP
// RUN: %clang -target armv7-eabi -mfpu=crypto-neon-fp-armv8 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NEON-SP-HP
// CHECK-NEON-SP-HP: __ARM_NEON 1
// CHECK-NEON-SP-HP: __ARM_NEON_FP 0x6
// RUN: %clang -target armv4-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-EXTENSIONS
// RUN: %clang -target armv5-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-EXTENSIONS
// RUN: %clang -target armv6-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-EXTENSIONS
// RUN: %clang -target armv7-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-EXTENSIONS
// CHECK-NO-EXTENSIONS-NOT: __ARM_FEATURE_CRC32
// CHECK-NO-EXTENSIONS-NOT: __ARM_FEATURE_CRYPTO
// CHECK-NO-EXTENSIONS-NOT: __ARM_FEATURE_DIRECTED_ROUNDING
// CHECK-NO-EXTENSIONS-NOT: __ARM_FEATURE_NUMERIC_MAXMIN
// RUN: %clang -target armv8-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-EXTENSIONS
// CHECK-EXTENSIONS: __ARM_FEATURE_CRC32 1
// CHECK-EXTENSIONS: __ARM_FEATURE_CRYPTO 1
// CHECK-EXTENSIONS: __ARM_FEATURE_DIRECTED_ROUNDING 1
// CHECK-EXTENSIONS: __ARM_FEATURE_NUMERIC_MAXMIN 1