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llvm-project/llvm/test/CodeGen/AArch64/mul-lohi.ll

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MachineCombiner Pass for selecting faster instruction sequence on AArch64 Re-commit of r214832,r21469 with a work-around that avoids the previous problem with gcc build compilers The work-around is to use SmallVector instead of ArrayRef of basic blocks in preservesResourceLen()/MachineCombiner.cpp llvm-svn: 215151
2014-08-08 05:40:58 +08:00
; RUN: llc -mtriple=arm64-apple-ios7.0 -mcpu=cyclone %s -o - | FileCheck %s
; RUN: llc -mtriple=aarch64_be-linux-gnu -mcpu=cyclone %s -o - | FileCheck --check-prefix=CHECK-BE %s
AArch64: don't try to handle [SU]MUL_LOHI nodes We should set them to expand for now since there are no patterns dealing with them. Actually, there are no instructions either so I doubt they'll ever be acceptable. llvm-svn: 199265
2014-01-15 06:53:22 +08:00
define i128 @test_128bitmul(i128 %lhs, i128 %rhs) {
AArch64_BE function argument passing for ARM ABI llvm-svn: 204814
2014-03-26 22:51:22 +08:00
; CHECK-LABEL: test_128bitmul:
MachineCombiner Pass for selecting faster instruction sequence on AArch64 Re-commit of r214832,r21469 with a work-around that avoids the previous problem with gcc build compilers The work-around is to use SmallVector instead of ArrayRef of basic blocks in preservesResourceLen()/MachineCombiner.cpp llvm-svn: 215151
2014-08-08 05:40:58 +08:00
; CHECK-DAG: mul [[PART1:x[0-9]+]], x0, x3
AArch64: don't try to handle [SU]MUL_LOHI nodes We should set them to expand for now since there are no patterns dealing with them. Actually, there are no instructions either so I doubt they'll ever be acceptable. llvm-svn: 199265
2014-01-15 06:53:22 +08:00
; CHECK-DAG: umulh [[CARRY:x[0-9]+]], x0, x2
MachineCombiner Pass for selecting faster instruction sequence on AArch64 Re-commit of r214832,r21469 with a work-around that avoids the previous problem with gcc build compilers The work-around is to use SmallVector instead of ArrayRef of basic blocks in preservesResourceLen()/MachineCombiner.cpp llvm-svn: 215151
2014-08-08 05:40:58 +08:00
; CHECK: mul [[PART2:x[0-9]+]], x1, x2
AArch64: don't try to handle [SU]MUL_LOHI nodes We should set them to expand for now since there are no patterns dealing with them. Actually, there are no instructions either so I doubt they'll ever be acceptable. llvm-svn: 199265
2014-01-15 06:53:22 +08:00
; CHECK: mul x0, x0, x2
AArch64_BE function argument passing for ARM ABI llvm-svn: 204814
2014-03-26 22:51:22 +08:00
; CHECK-BE-LABEL: test_128bitmul:
MachineCombiner Pass for selecting faster instruction sequence on AArch64 Re-commit of r214832,r21469 with a work-around that avoids the previous problem with gcc build compilers The work-around is to use SmallVector instead of ArrayRef of basic blocks in preservesResourceLen()/MachineCombiner.cpp llvm-svn: 215151
2014-08-08 05:40:58 +08:00
; CHECK-BE-DAG: mul [[PART1:x[0-9]+]], x1, x2
AArch64_BE function argument passing for ARM ABI llvm-svn: 204814
2014-03-26 22:51:22 +08:00
; CHECK-BE-DAG: umulh [[CARRY:x[0-9]+]], x1, x3
MachineCombiner Pass for selecting faster instruction sequence on AArch64 Re-commit of r214832,r21469 with a work-around that avoids the previous problem with gcc build compilers The work-around is to use SmallVector instead of ArrayRef of basic blocks in preservesResourceLen()/MachineCombiner.cpp llvm-svn: 215151
2014-08-08 05:40:58 +08:00
; CHECK-BE: mul [[PART2:x[0-9]+]], x0, x3
AArch64_BE function argument passing for ARM ABI llvm-svn: 204814
2014-03-26 22:51:22 +08:00
; CHECK-BE: mul x1, x1, x3
AArch64: don't try to handle [SU]MUL_LOHI nodes We should set them to expand for now since there are no patterns dealing with them. Actually, there are no instructions either so I doubt they'll ever be acceptable. llvm-svn: 199265
2014-01-15 06:53:22 +08:00
%prod = mul i128 %lhs, %rhs
ret i128 %prod
}