2019-07-13 02:13:16 +08:00
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; Test vector insertions of byte-swapped memory values into 0.
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;
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2019-09-21 07:04:45 +08:00
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s
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2019-07-13 02:13:16 +08:00
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declare i16 @llvm.bswap.i16(i16)
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declare i32 @llvm.bswap.i32(i32)
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declare i64 @llvm.bswap.i64(i64)
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declare <8 x i16> @llvm.bswap.v8i16(<8 x i16>)
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declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>)
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declare <2 x i64> @llvm.bswap.v2i64(<2 x i64>)
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; Test VLLEBRZH.
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define <8 x i16> @f1(i16 *%ptr) {
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; CHECK-LABEL: f1:
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; CHECK: vllebrzh %v24, 0(%r2)
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; CHECK: br %r14
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%val = load i16, i16 *%ptr
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%swap = call i16 @llvm.bswap.i16(i16 %val)
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%ret = insertelement <8 x i16> zeroinitializer, i16 %swap, i32 3
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ret <8 x i16> %ret
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}
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; Test VLLEBRZH using a vector bswap.
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define <8 x i16> @f2(i16 *%ptr) {
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; CHECK-LABEL: f2:
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; CHECK: vllebrzh %v24, 0(%r2)
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; CHECK: br %r14
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%val = load i16, i16 *%ptr
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%insert = insertelement <8 x i16> zeroinitializer, i16 %val, i32 3
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%ret = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %insert)
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ret <8 x i16> %ret
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}
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; Test VLLEBRZF.
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define <4 x i32> @f3(i32 *%ptr) {
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; CHECK-LABEL: f3:
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; CHECK: vllebrzf %v24, 0(%r2)
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; CHECK: br %r14
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%val = load i32, i32 *%ptr
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%swap = call i32 @llvm.bswap.i32(i32 %val)
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%ret = insertelement <4 x i32> zeroinitializer, i32 %swap, i32 1
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ret <4 x i32> %ret
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}
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; Test VLLEBRZF using a vector bswap.
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define <4 x i32> @f4(i32 *%ptr) {
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; CHECK-LABEL: f4:
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; CHECK: vllebrzf %v24, 0(%r2)
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; CHECK: br %r14
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%val = load i32, i32 *%ptr
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%insert = insertelement <4 x i32> zeroinitializer, i32 %val, i32 1
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%ret = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %insert)
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ret <4 x i32> %ret
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}
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; Test VLLEBRZG.
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define <2 x i64> @f5(i64 *%ptr) {
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; CHECK-LABEL: f5:
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; CHECK: vllebrzg %v24, 0(%r2)
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; CHECK: br %r14
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%val = load i64, i64 *%ptr
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%swap = call i64 @llvm.bswap.i64(i64 %val)
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%ret = insertelement <2 x i64> zeroinitializer, i64 %swap, i32 0
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ret <2 x i64> %ret
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}
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; Test VLLEBRZG using a vector bswap.
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define <2 x i64> @f6(i64 *%ptr) {
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; CHECK-LABEL: f6:
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; CHECK: vllebrzg %v24, 0(%r2)
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; CHECK: br %r14
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%val = load i64, i64 *%ptr
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%insert = insertelement <2 x i64> zeroinitializer, i64 %val, i32 0
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%ret = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %insert)
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ret <2 x i64> %ret
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}
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; Test VLLEBRZE.
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define <4 x i32> @f7(i32 *%ptr) {
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; CHECK-LABEL: f7:
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; CHECK: vllebrze %v24, 0(%r2)
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; CHECK: br %r14
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%val = load i32, i32 *%ptr
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%swap = call i32 @llvm.bswap.i32(i32 %val)
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%ret = insertelement <4 x i32> zeroinitializer, i32 %swap, i32 0
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ret <4 x i32> %ret
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}
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; Test VLLEBRZE using a vector bswap.
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define <4 x i32> @f8(i32 *%ptr) {
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; CHECK-LABEL: f8:
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; CHECK: vllebrze %v24, 0(%r2)
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; CHECK: br %r14
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%val = load i32, i32 *%ptr
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%insert = insertelement <4 x i32> zeroinitializer, i32 %val, i32 0
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%ret = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %insert)
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ret <4 x i32> %ret
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}
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; Test VLLEBRZH with the highest in-range offset.
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define <8 x i16> @f9(i16 *%base) {
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; CHECK-LABEL: f9:
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; CHECK: vllebrzh %v24, 4094(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i16, i16 *%base, i64 2047
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%val = load i16, i16 *%ptr
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%swap = call i16 @llvm.bswap.i16(i16 %val)
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%ret = insertelement <8 x i16> zeroinitializer, i16 %swap, i32 3
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ret <8 x i16> %ret
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}
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; Test VLLEBRZH with the next highest offset.
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define <8 x i16> @f10(i16 *%base) {
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; CHECK-LABEL: f10:
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; CHECK-NOT: vllebrzh %v24, 4096(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i16, i16 *%base, i64 2048
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%val = load i16, i16 *%ptr
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%swap = call i16 @llvm.bswap.i16(i16 %val)
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%ret = insertelement <8 x i16> zeroinitializer, i16 %swap, i32 3
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ret <8 x i16> %ret
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}
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; Test that VLLEBRZH allows an index.
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define <8 x i16> @f11(i16 *%base, i64 %index) {
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; CHECK-LABEL: f11:
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; CHECK: sllg [[REG:%r[1-5]]], %r3, 1
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; CHECK: vllebrzh %v24, 0([[REG]],%r2)
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; CHECK: br %r14
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%ptr = getelementptr i16, i16 *%base, i64 %index
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%val = load i16, i16 *%ptr
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%swap = call i16 @llvm.bswap.i16(i16 %val)
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%ret = insertelement <8 x i16> zeroinitializer, i16 %swap, i32 3
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ret <8 x i16> %ret
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}
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