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llvm-project/llvm/test/CodeGen/RISCV/option-norvc.ll

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[RISCV] Support .option rvc and norvc assembler directives These directives allow the 'C' (compressed) extension to be enabled/disabled within a single file. Differential Revision: https://reviews.llvm.org/D45864 Patch by Kito Cheng llvm-svn: 332107
2018-05-12 01:30:28 +08:00
; RUN: llc -mtriple=riscv32 -mattr=+c -filetype=obj < %s\
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options As announced here: http://lists.llvm.org/pipermail/llvm-dev/2019-April/131786.html Grouped option syntax (POSIX Utility Conventions) does not play well with -long-option A subsequent change will reject -long-option.
2020-03-16 07:17:52 +08:00
; RUN: | llvm-objdump --triple=riscv32 --mattr=+c -d -M no-aliases -\
[RISCV] Support .option rvc and norvc assembler directives These directives allow the 'C' (compressed) extension to be enabled/disabled within a single file. Differential Revision: https://reviews.llvm.org/D45864 Patch by Kito Cheng llvm-svn: 332107
2018-05-12 01:30:28 +08:00
; RUN: | FileCheck -check-prefix=CHECK %s
; This test demonstrates that .option norvc has no effect on codegen when
; emitting an ELF directly.
define i32 @add(i32 %a, i32 %b) nounwind {
[llvm-objdump] -d: print `00000000 <foo>:` instead of `00000000 foo:` The new behavior matches GNU objdump. A pair of angle brackets makes tests slightly easier. `.foo:` is not unique and thus cannot be used in a `CHECK-LABEL:` directive. Without `-LABEL`, the CHECK line can match the `Disassembly of section` line and causes the next `CHECK-NEXT:` to fail. ``` Disassembly of section .foo: 0000000000001634 .foo: ``` Bdragon: <> has metalinguistic connotation. it just "feels right" Reviewed By: rupprecht Differential Revision: https://reviews.llvm.org/D75713
2020-03-06 06:18:38 +08:00
; CHECK-LABEL: <add>:
[RISCV] Support .option rvc and norvc assembler directives These directives allow the 'C' (compressed) extension to be enabled/disabled within a single file. Differential Revision: https://reviews.llvm.org/D45864 Patch by Kito Cheng llvm-svn: 332107
2018-05-12 01:30:28 +08:00
; CHECK: c.add a0, a1
; CHECK-NEXT: c.jr ra
tail call void asm sideeffect ".option norvc", ""()
%add = add nsw i32 %b, %a
ret i32 %add
}