2017-05-31 16:04:07 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
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2018-12-05 04:14:57 +08:00
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; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE \
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2017-05-31 16:04:07 +08:00
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; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
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2018-12-05 04:14:57 +08:00
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; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE \
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2017-05-31 16:04:07 +08:00
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; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
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2019-09-21 04:31:37 +08:00
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@glob = local_unnamed_addr global i64 0, align 8
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2017-05-31 16:04:07 +08:00
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; Function Attrs: norecurse nounwind readnone
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define i64 @test_lleqsll(i64 %a, i64 %b) {
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; CHECK-LABEL: test_lleqsll:
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2017-12-05 01:18:51 +08:00
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; CHECK: # %bb.0: # %entry
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2017-05-31 16:04:07 +08:00
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: cntlzd r3, r3
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; CHECK-NEXT: rldicl r3, r3, 58, 63
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; CHECK-NEXT: blr
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2018-12-05 04:14:57 +08:00
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|
; CHECK-BE-LABEL: test_lleqsll:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: xor r3, r3, r4
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; CHECK-BE-NEXT: cntlzd r3, r3
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; CHECK-BE-NEXT: rldicl r3, r3, 58, 63
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; CHECK-BE-NEXT: blr
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;
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; CHECK-LE-LABEL: test_lleqsll:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: xor r3, r3, r4
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; CHECK-LE-NEXT: cntlzd r3, r3
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; CHECK-LE-NEXT: rldicl r3, r3, 58, 63
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; CHECK-LE-NEXT: blr
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2017-05-31 16:04:07 +08:00
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entry:
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|
%cmp = icmp eq i64 %a, %b
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%conv1 = zext i1 %cmp to i64
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ret i64 %conv1
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}
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; Function Attrs: norecurse nounwind readnone
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define i64 @test_lleqsll_sext(i64 %a, i64 %b) {
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; CHECK-LABEL: test_lleqsll_sext:
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2017-12-05 01:18:51 +08:00
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; CHECK: # %bb.0: # %entry
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2017-05-31 16:04:07 +08:00
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: addic r3, r3, -1
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; CHECK-NEXT: subfe r3, r3, r3
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; CHECK-NEXT: blr
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2018-12-05 04:14:57 +08:00
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; CHECK-BE-LABEL: test_lleqsll_sext:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: xor r3, r3, r4
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; CHECK-BE-NEXT: addic r3, r3, -1
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; CHECK-BE-NEXT: subfe r3, r3, r3
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; CHECK-BE-NEXT: blr
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;
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; CHECK-LE-LABEL: test_lleqsll_sext:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: xor r3, r3, r4
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; CHECK-LE-NEXT: addic r3, r3, -1
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; CHECK-LE-NEXT: subfe r3, r3, r3
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; CHECK-LE-NEXT: blr
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2017-05-31 16:04:07 +08:00
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entry:
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%cmp = icmp eq i64 %a, %b
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%conv1 = sext i1 %cmp to i64
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ret i64 %conv1
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}
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; Function Attrs: norecurse nounwind readnone
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define i64 @test_lleqsll_z(i64 %a) {
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; CHECK-LABEL: test_lleqsll_z:
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2017-12-05 01:18:51 +08:00
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; CHECK: # %bb.0: # %entry
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2017-05-31 16:04:07 +08:00
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; CHECK-NEXT: cntlzd r3, r3
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; CHECK-NEXT: rldicl r3, r3, 58, 63
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; CHECK-NEXT: blr
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2018-12-05 04:14:57 +08:00
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; CHECK-BE-LABEL: test_lleqsll_z:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: cntlzd r3, r3
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; CHECK-BE-NEXT: rldicl r3, r3, 58, 63
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; CHECK-BE-NEXT: blr
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;
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; CHECK-LE-LABEL: test_lleqsll_z:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: cntlzd r3, r3
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; CHECK-LE-NEXT: rldicl r3, r3, 58, 63
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; CHECK-LE-NEXT: blr
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2017-05-31 16:04:07 +08:00
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|
entry:
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%cmp = icmp eq i64 %a, 0
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%conv1 = zext i1 %cmp to i64
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ret i64 %conv1
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}
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; Function Attrs: norecurse nounwind readnone
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define i64 @test_lleqsll_sext_z(i64 %a) {
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; CHECK-LABEL: test_lleqsll_sext_z:
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2017-12-05 01:18:51 +08:00
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; CHECK: # %bb.0: # %entry
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2017-05-31 16:04:07 +08:00
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; CHECK-NEXT: addic r3, r3, -1
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; CHECK-NEXT: subfe r3, r3, r3
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; CHECK-NEXT: blr
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2018-12-05 04:14:57 +08:00
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|
; CHECK-BE-LABEL: test_lleqsll_sext_z:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: addic r3, r3, -1
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; CHECK-BE-NEXT: subfe r3, r3, r3
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; CHECK-BE-NEXT: blr
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;
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; CHECK-LE-LABEL: test_lleqsll_sext_z:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: addic r3, r3, -1
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; CHECK-LE-NEXT: subfe r3, r3, r3
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; CHECK-LE-NEXT: blr
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2017-05-31 16:04:07 +08:00
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|
entry:
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|
%cmp = icmp eq i64 %a, 0
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%conv1 = sext i1 %cmp to i64
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|
ret i64 %conv1
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}
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; Function Attrs: norecurse nounwind
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define void @test_lleqsll_store(i64 %a, i64 %b) {
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|
; CHECK-LABEL: test_lleqsll_store:
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2017-12-05 01:18:51 +08:00
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|
|
; CHECK: # %bb.0: # %entry
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2017-05-31 16:04:07 +08:00
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; CHECK-NEXT: xor r3, r3, r4
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2018-12-05 04:14:57 +08:00
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; CHECK-NEXT: addis r5, r2, glob@toc@ha
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2017-05-31 16:04:07 +08:00
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; CHECK-NEXT: cntlzd r3, r3
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; CHECK-NEXT: rldicl r3, r3, 58, 63
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2018-12-05 04:14:57 +08:00
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; CHECK-NEXT: std r3, glob@toc@l(r5)
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2017-05-31 16:04:07 +08:00
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; CHECK-NEXT: blr
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2018-12-05 04:14:57 +08:00
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|
; CHECK-BE-LABEL: test_lleqsll_store:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: addis r5, r2, .LC0@toc@ha
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; CHECK-BE-NEXT: xor r3, r3, r4
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; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r5)
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; CHECK-BE-NEXT: cntlzd r3, r3
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; CHECK-BE-NEXT: rldicl r3, r3, 58, 63
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; CHECK-BE-NEXT: std r3, 0(r4)
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; CHECK-BE-NEXT: blr
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;
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; CHECK-LE-LABEL: test_lleqsll_store:
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|
; CHECK-LE: # %bb.0: # %entry
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|
; CHECK-LE-NEXT: xor r3, r3, r4
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; CHECK-LE-NEXT: addis r5, r2, glob@toc@ha
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; CHECK-LE-NEXT: cntlzd r3, r3
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; CHECK-LE-NEXT: rldicl r3, r3, 58, 63
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|
; CHECK-LE-NEXT: std r3, glob@toc@l(r5)
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; CHECK-LE-NEXT: blr
|
2017-05-31 16:04:07 +08:00
|
|
|
entry:
|
|
|
|
%cmp = icmp eq i64 %a, %b
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|
|
|
%conv1 = zext i1 %cmp to i64
|
|
|
|
store i64 %conv1, i64* @glob, align 8
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|
|
ret void
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|
|
|
}
|
|
|
|
|
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|
|
; Function Attrs: norecurse nounwind
|
|
|
|
define void @test_lleqsll_sext_store(i64 %a, i64 %b) {
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|
|
|
; CHECK-LABEL: test_lleqsll_sext_store:
|
2017-12-05 01:18:51 +08:00
|
|
|
; CHECK: # %bb.0: # %entry
|
2017-05-31 16:04:07 +08:00
|
|
|
; CHECK-NEXT: xor r3, r3, r4
|
2018-12-05 04:14:57 +08:00
|
|
|
; CHECK-NEXT: addis r5, r2, glob@toc@ha
|
2017-05-31 16:04:07 +08:00
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|
|
; CHECK-NEXT: addic r3, r3, -1
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|
|
|
; CHECK-NEXT: subfe r3, r3, r3
|
2018-12-05 04:14:57 +08:00
|
|
|
; CHECK-NEXT: std r3, glob@toc@l(r5)
|
2017-05-31 16:04:07 +08:00
|
|
|
; CHECK-NEXT: blr
|
2018-12-05 04:14:57 +08:00
|
|
|
; CHECK-BE-LABEL: test_lleqsll_sext_store:
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|
|
|
; CHECK-BE: # %bb.0: # %entry
|
|
|
|
; CHECK-BE-NEXT: addis r5, r2, .LC0@toc@ha
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|
; CHECK-BE-NEXT: xor r3, r3, r4
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|
; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r5)
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|
; CHECK-BE-NEXT: addic r3, r3, -1
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|
; CHECK-BE-NEXT: subfe r3, r3, r3
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|
; CHECK-BE-NEXT: std r3, 0(r4)
|
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|
|
; CHECK-BE-NEXT: blr
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|
;
|
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|
|
; CHECK-LE-LABEL: test_lleqsll_sext_store:
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|
|
|
; CHECK-LE: # %bb.0: # %entry
|
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|
|
; CHECK-LE-NEXT: xor r3, r3, r4
|
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|
|
; CHECK-LE-NEXT: addis r5, r2, glob@toc@ha
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|
; CHECK-LE-NEXT: addic r3, r3, -1
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|
|
; CHECK-LE-NEXT: subfe r3, r3, r3
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|
|
; CHECK-LE-NEXT: std r3, glob@toc@l(r5)
|
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|
|
; CHECK-LE-NEXT: blr
|
2017-05-31 16:04:07 +08:00
|
|
|
entry:
|
|
|
|
%cmp = icmp eq i64 %a, %b
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|
|
%conv1 = sext i1 %cmp to i64
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|
|
|
store i64 %conv1, i64* @glob, align 8
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|
|
ret void
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|
|
|
}
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|
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|
|
|
|
|
; Function Attrs: norecurse nounwind
|
|
|
|
define void @test_lleqsll_z_store(i64 %a) {
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|
|
|
; CHECK-LABEL: test_lleqsll_z_store:
|
2017-12-05 01:18:51 +08:00
|
|
|
; CHECK: # %bb.0: # %entry
|
2017-05-31 16:04:07 +08:00
|
|
|
; CHECK-NEXT: cntlzd r3, r3
|
2018-12-05 04:14:57 +08:00
|
|
|
; CHECK-NEXT: addis r4, r2, glob@toc@ha
|
2017-05-31 16:04:07 +08:00
|
|
|
; CHECK-NEXT: rldicl r3, r3, 58, 63
|
2018-12-05 04:14:57 +08:00
|
|
|
; CHECK-NEXT: std r3, glob@toc@l(r4)
|
2017-05-31 16:04:07 +08:00
|
|
|
; CHECK-NEXT: blr
|
2018-12-05 04:14:57 +08:00
|
|
|
; CHECK-BE-LABEL: test_lleqsll_z_store:
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|
|
|
; CHECK-BE: # %bb.0: # %entry
|
|
|
|
; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha
|
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|
|
; CHECK-BE-NEXT: cntlzd r3, r3
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|
|
; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4)
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|
|
; CHECK-BE-NEXT: rldicl r3, r3, 58, 63
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|
; CHECK-BE-NEXT: std r3, 0(r4)
|
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|
|
; CHECK-BE-NEXT: blr
|
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|
|
;
|
|
|
|
; CHECK-LE-LABEL: test_lleqsll_z_store:
|
|
|
|
; CHECK-LE: # %bb.0: # %entry
|
|
|
|
; CHECK-LE-NEXT: cntlzd r3, r3
|
|
|
|
; CHECK-LE-NEXT: addis r4, r2, glob@toc@ha
|
|
|
|
; CHECK-LE-NEXT: rldicl r3, r3, 58, 63
|
|
|
|
; CHECK-LE-NEXT: std r3, glob@toc@l(r4)
|
|
|
|
; CHECK-LE-NEXT: blr
|
2017-05-31 16:04:07 +08:00
|
|
|
entry:
|
|
|
|
%cmp = icmp eq i64 %a, 0
|
|
|
|
%conv1 = zext i1 %cmp to i64
|
|
|
|
store i64 %conv1, i64* @glob, align 8
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
|
|
|
; Function Attrs: norecurse nounwind
|
|
|
|
define void @test_lleqsll_sext_z_store(i64 %a) {
|
|
|
|
; CHECK-LABEL: test_lleqsll_sext_z_store:
|
2017-12-05 01:18:51 +08:00
|
|
|
; CHECK: # %bb.0: # %entry
|
2017-05-31 16:04:07 +08:00
|
|
|
; CHECK-NEXT: addic r3, r3, -1
|
2018-12-05 04:14:57 +08:00
|
|
|
; CHECK-NEXT: addis r4, r2, glob@toc@ha
|
2017-05-31 16:04:07 +08:00
|
|
|
; CHECK-NEXT: subfe r3, r3, r3
|
2018-12-05 04:14:57 +08:00
|
|
|
; CHECK-NEXT: std r3, glob@toc@l(r4)
|
2017-05-31 16:04:07 +08:00
|
|
|
; CHECK-NEXT: blr
|
2018-12-05 04:14:57 +08:00
|
|
|
; CHECK-BE-LABEL: test_lleqsll_sext_z_store:
|
|
|
|
; CHECK-BE: # %bb.0: # %entry
|
|
|
|
; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha
|
|
|
|
; CHECK-BE-NEXT: addic r3, r3, -1
|
|
|
|
; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4)
|
|
|
|
; CHECK-BE-NEXT: subfe r3, r3, r3
|
|
|
|
; CHECK-BE-NEXT: std r3, 0(r4)
|
|
|
|
; CHECK-BE-NEXT: blr
|
|
|
|
;
|
|
|
|
; CHECK-LE-LABEL: test_lleqsll_sext_z_store:
|
|
|
|
; CHECK-LE: # %bb.0: # %entry
|
|
|
|
; CHECK-LE-NEXT: addic r3, r3, -1
|
|
|
|
; CHECK-LE-NEXT: addis r4, r2, glob@toc@ha
|
|
|
|
; CHECK-LE-NEXT: subfe r3, r3, r3
|
|
|
|
; CHECK-LE-NEXT: std r3, glob@toc@l(r4)
|
|
|
|
; CHECK-LE-NEXT: blr
|
2017-05-31 16:04:07 +08:00
|
|
|
entry:
|
|
|
|
%cmp = icmp eq i64 %a, 0
|
|
|
|
%conv1 = sext i1 %cmp to i64
|
|
|
|
store i64 %conv1, i64* @glob, align 8
|
|
|
|
ret void
|
|
|
|
}
|