llvm-project/llvm/test/CodeGen/X86/epilogue.ll

; RUN: llc < %s -mcpu=generic -march=x86 | not grep lea
; RUN: llc < %s -mcpu=generic -march=x86 | grep {movl	%ebp}

declare void @bar(<2 x i64>* %n)

define void @foo(i64 %h) {
  %k = trunc i64 %h to i32
  %p = alloca <2 x i64>, i32 %k
  call void @bar(<2 x i64>* %p)
  ret void
}
Instruction scheduling itinerary for Intel Atom. Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT. Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches. Adds a test to verify that the scheduler is working. Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP. Patch by Preston Gurd! llvm-svn: 149558 2012-02-02 07:20:51 +08:00			`; RUN: llc < %s -mcpu=generic -march=x86 \| not grep lea`
			`; RUN: llc < %s -mcpu=generic -march=x86 \| grep {movl %ebp}`
New test. llvm-svn: 40020 2007-07-19 05:39:16 +08:00
			`declare void @bar(<2 x i64>* %n)`

			`define void @foo(i64 %h) {`
			`%k = trunc i64 %h to i32`
			`%p = alloca <2 x i64>, i32 %k`
			`call void @bar(<2 x i64>* %p)`
			`ret void`
			`}`