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llvm-project/llvm/test/CodeGen/Mips/brdelayslot.ll

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Fix tests defaulting to incorrect triples on AIX The tests only specify -march, so when the tests are run on AIX the target OS defaults to AIX, which causes the tests to misbehave. This patch constrains the tests by specifying -mtriple instead of -march. Reviewed By: daltenty, jsji, MaskRay Differential Revision: https://reviews.llvm.org/D110186
2021-09-27 23:29:53 +08:00
; RUN: llc -mtriple=mipsel -O0 < %s | FileCheck %s -check-prefix=None
; RUN: llc -mtriple=mipsel -relocation-model=pic < %s | \
[mips] Make Static a default relocation model for MIPS codegen This change follows up defaults for GCC and Clang, so LLVM does not differ from them. While number of the test files are touched with this change, they all keep the old (expected) behaviour with the explicit option: "-relocation-model=pic" The tests that have not been touched are insensitive to relocation model. Differential Revision: http://reviews.llvm.org/D17995 llvm-svn: 265949
2016-04-11 23:24:23 +08:00
; RUN: FileCheck %s -check-prefix=Default
Fix tests defaulting to incorrect triples on AIX The tests only specify -march, so when the tests are run on AIX the target OS defaults to AIX, which causes the tests to misbehave. This patch constrains the tests by specifying -mtriple instead of -march. Reviewed By: daltenty, jsji, MaskRay Differential Revision: https://reviews.llvm.org/D110186
2021-09-27 23:29:53 +08:00
; RUN: llc -mtriple=mipsel -O1 -relocation-model=static < %s | \
[mips] Define class MemDefsUses. This class tracks dependence between memory instructions using underlying objects of memory operands. llvm-svn: 176313
2013-03-01 08:16:31 +08:00
; RUN: FileCheck %s -check-prefix=STATICO1
Fix tests defaulting to incorrect triples on AIX The tests only specify -march, so when the tests are run on AIX the target OS defaults to AIX, which causes the tests to misbehave. This patch constrains the tests by specifying -mtriple instead of -march. Reviewed By: daltenty, jsji, MaskRay Differential Revision: https://reviews.llvm.org/D110186
2021-09-27 23:29:53 +08:00
; RUN: llc -mtriple=mipsel -disable-mips-df-forward-search=false \
[mips] Add capability to search in the forward direction for instructions that can fill the delay slot. Currently, this is off by default. llvm-svn: 176320
2013-03-01 08:50:52 +08:00
; RUN: -relocation-model=static < %s | FileCheck %s -check-prefix=FORWARD
Fix tests defaulting to incorrect triples on AIX The tests only specify -march, so when the tests are run on AIX the target OS defaults to AIX, which causes the tests to misbehave. This patch constrains the tests by specifying -mtriple instead of -march. Reviewed By: daltenty, jsji, MaskRay Differential Revision: https://reviews.llvm.org/D110186
2021-09-27 23:29:53 +08:00
; RUN: llc -mtriple=mipsel -disable-mips-df-backward-search -relocation-model=pic \
[mips] Support shrink-wrapping Except for -O0, it's enabled by default. Patch by Vladimir Stefanovic. Differential Revision: https://reviews.llvm.org/D47947 llvm-svn: 335989
2018-06-30 00:37:16 +08:00
; RUN: -enable-shrink-wrap=false \
Don't delete empty preheaders in CodeGenPrepare if it would create a critical edge Presently, CodeGenPrepare deletes all nearly empty (only phi and branch) basic blocks. This pass can delete loop preheaders which frequently creates critical edges. A preheader can be a convenient place to spill registers to the stack. If the entrance to a loop body is a critical edge, then spills may occur in the loop body rather than immediately before it. This patch protects loop preheaders from deletion in CodeGenPrepare even if they are nearly empty. Since the patch alters the CFG, it affects a large number of test cases. In most cases, the changes are merely cosmetic (basic blocks have different names or instruction orders change slightly). I am somewhat concerned about the test/CodeGen/Mips/brdelayslot.ll test case. If the loop preheader is not deleted, then the MIPS backend does not take advantage of a branch delay slot. Consequently, I would like some close review by a MIPS expert. The patch also partially subsumes D16893 from George Burgess IV. George correctly notes that CodeGenPrepare does not actually preserve the dominator tree. I think the dominator tree was usually not valid when CodeGenPrepare ran, but I am using LoopInfo to mark preheaders, so the dominator tree is now always valid before CodeGenPrepare. Author: Tom Jablin (tjablin) Reviewers: hfinkel george.burgess.iv vkalintiris dsanders kbarton cycheng http://reviews.llvm.org/D16984 llvm-svn: 265397
2016-04-05 22:06:20 +08:00
; RUN: -disable-mips-df-succbb-search=false -disable-preheader-prot=true < %s | \
[mips] Add the capability to search delay slot filling instructions in successor basic blocks. Currently this is off by default. llvm-svn: 176329
2013-03-01 10:03:51 +08:00
; RUN: FileCheck %s -check-prefix=SUCCBB
Fill delay slot with useful instructions. Modified from Sparc's version of delay slot filler. Patch by Reed Kotler at Mips Technologies. llvm-svn: 140825
2011-09-30 07:52:13 +08:00
define void @foo1() nounwind {
entry:
Don't delete empty preheaders in CodeGenPrepare if it would create a critical edge Presently, CodeGenPrepare deletes all nearly empty (only phi and branch) basic blocks. This pass can delete loop preheaders which frequently creates critical edges. A preheader can be a convenient place to spill registers to the stack. If the entrance to a loop body is a critical edge, then spills may occur in the loop body rather than immediately before it. This patch protects loop preheaders from deletion in CodeGenPrepare even if they are nearly empty. Since the patch alters the CFG, it affects a large number of test cases. In most cases, the changes are merely cosmetic (basic blocks have different names or instruction orders change slightly). I am somewhat concerned about the test/CodeGen/Mips/brdelayslot.ll test case. If the loop preheader is not deleted, then the MIPS backend does not take advantage of a branch delay slot. Consequently, I would like some close review by a MIPS expert. The patch also partially subsumes D16893 from George Burgess IV. George correctly notes that CodeGenPrepare does not actually preserve the dominator tree. I think the dominator tree was usually not valid when CodeGenPrepare ran, but I am using LoopInfo to mark preheaders, so the dominator tree is now always valid before CodeGenPrepare. Author: Tom Jablin (tjablin) Reviewers: hfinkel george.burgess.iv vkalintiris dsanders kbarton cycheng http://reviews.llvm.org/D16984 llvm-svn: 265397
2016-04-05 22:06:20 +08:00
; Default: jalr
; Default-NOT: nop
; Default: jr
Disable Mips' delay slot filler when optimization level is O0. llvm-svn: 162589
2012-08-25 04:40:15 +08:00
; Default-NOT: nop
; Default: .end
Don't delete empty preheaders in CodeGenPrepare if it would create a critical edge Presently, CodeGenPrepare deletes all nearly empty (only phi and branch) basic blocks. This pass can delete loop preheaders which frequently creates critical edges. A preheader can be a convenient place to spill registers to the stack. If the entrance to a loop body is a critical edge, then spills may occur in the loop body rather than immediately before it. This patch protects loop preheaders from deletion in CodeGenPrepare even if they are nearly empty. Since the patch alters the CFG, it affects a large number of test cases. In most cases, the changes are merely cosmetic (basic blocks have different names or instruction orders change slightly). I am somewhat concerned about the test/CodeGen/Mips/brdelayslot.ll test case. If the loop preheader is not deleted, then the MIPS backend does not take advantage of a branch delay slot. Consequently, I would like some close review by a MIPS expert. The patch also partially subsumes D16893 from George Burgess IV. George correctly notes that CodeGenPrepare does not actually preserve the dominator tree. I think the dominator tree was usually not valid when CodeGenPrepare ran, but I am using LoopInfo to mark preheaders, so the dominator tree is now always valid before CodeGenPrepare. Author: Tom Jablin (tjablin) Reviewers: hfinkel george.burgess.iv vkalintiris dsanders kbarton cycheng http://reviews.llvm.org/D16984 llvm-svn: 265397
2016-04-05 22:06:20 +08:00
; None: jalr
; None: nop
; None: jr
Disable Mips' delay slot filler when optimization level is O0. llvm-svn: 162589
2012-08-25 04:40:15 +08:00
; None: nop
; None: .end
Fill delay slot with useful instructions. Modified from Sparc's version of delay slot filler. Patch by Reed Kotler at Mips Technologies. llvm-svn: 140825
2011-09-30 07:52:13 +08:00
[mips] Enable tail calls by default Enable tail calls by default for (micro)MIPS(64). microMIPS is slightly more tricky than doing it for MIPS(R6) or microMIPSR6. microMIPS has two instruction encodings: 16bit and 32bit along with some restrictions on the size of the instruction that can fill the delay slot. For safe tail calls for microMIPS, the delay slot filler attempts to find a correct size instruction for the delay slot of TAILCALL pseudos. Reviewers: dsanders, vkalintris Subscribers: jfb, dsanders, sdardis, llvm-commits Differential Revision: https://reviews.llvm.org/D21138 llvm-svn: 277708
2016-08-04 17:17:07 +08:00
call void @foo2(i32 3) nounwind
Fill delay slot with useful instructions. Modified from Sparc's version of delay slot filler. Patch by Reed Kotler at Mips Technologies. llvm-svn: 140825
2011-09-30 07:52:13 +08:00
ret void
}
declare void @foo2(i32)
[mips] Set flag neverHasSideEffects flag on floating point conversion instructions. llvm-svn: 167348
2012-11-03 08:53:12 +08:00
; Check that cvt.d.w goes into jalr's delay slot.
;
define void @foo3(i32 %a) nounwind {
entry:
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 14:24:09 +08:00
; Default-LABEL: foo3:
[mips] Set flag neverHasSideEffects flag on floating point conversion instructions. llvm-svn: 167348
2012-11-03 08:53:12 +08:00
; Default: jalr
; Default: cvt.d.w
%conv = sitofp i32 %a to double
[mips] Enable tail calls by default Enable tail calls by default for (micro)MIPS(64). microMIPS is slightly more tricky than doing it for MIPS(R6) or microMIPSR6. microMIPS has two instruction encodings: 16bit and 32bit along with some restrictions on the size of the instruction that can fill the delay slot. For safe tail calls for microMIPS, the delay slot filler attempts to find a correct size instruction for the delay slot of TAILCALL pseudos. Reviewers: dsanders, vkalintris Subscribers: jfb, dsanders, sdardis, llvm-commits Differential Revision: https://reviews.llvm.org/D21138 llvm-svn: 277708
2016-08-04 17:17:07 +08:00
call void @foo4(double %conv) nounwind
[mips] Set flag neverHasSideEffects flag on floating point conversion instructions. llvm-svn: 167348
2012-11-03 08:53:12 +08:00
ret void
}
declare void @foo4(double)
[mips] Fix delay slot filler so that instructions with register operand $1 are allowed in branch delay slot. llvm-svn: 168131
2012-11-16 10:39:34 +08:00
@g2 = external global i32
@g1 = external global i32
@g3 = external global i32
; Check that branch delay slot can be filled with an instruction with operand
; $1.
;
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 14:24:09 +08:00
; Default-LABEL: foo5:
[mips] Fix delay slot filler so that instructions with register operand $1 are allowed in branch delay slot. llvm-svn: 168131
2012-11-16 10:39:34 +08:00
; Default-NOT: nop
define void @foo5(i32 %a) nounwind {
entry:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load i32, i32* @g2, align 4
[mips] Fix delay slot filler so that instructions with register operand $1 are allowed in branch delay slot. llvm-svn: 168131
2012-11-16 10:39:34 +08:00
%tobool = icmp eq i32 %a, 0
br i1 %tobool, label %if.else, label %if.then
if.then:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%1 = load i32, i32* @g1, align 4
[mips] Fix delay slot filler so that instructions with register operand $1 are allowed in branch delay slot. llvm-svn: 168131
2012-11-16 10:39:34 +08:00
%add = add nsw i32 %1, %0
store i32 %add, i32* @g1, align 4
br label %if.end
if.else:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%2 = load i32, i32* @g3, align 4
[mips] Fix delay slot filler so that instructions with register operand $1 are allowed in branch delay slot. llvm-svn: 168131
2012-11-16 10:39:34 +08:00
%sub = sub nsw i32 %2, %0
store i32 %sub, i32* @g3, align 4
br label %if.end
if.end:
ret void
}
[mips] Set flag neverHasSideEffects flag on some of the floating point instructions. llvm-svn: 173401
2013-01-25 08:20:39 +08:00
; Check that delay slot filler can place mov.s or mov.d in delay slot.
;
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 14:24:09 +08:00
; Default-LABEL: foo6:
[mips] Set flag neverHasSideEffects flag on some of the floating point instructions. llvm-svn: 173401
2013-01-25 08:20:39 +08:00
; Default-NOT: nop
[mips] Add the capability to search delay slot filling instructions in successor basic blocks. Currently this is off by default. llvm-svn: 176329
2013-03-01 10:03:51 +08:00
; Default: .end foo6
[mips] Set flag neverHasSideEffects flag on some of the floating point instructions. llvm-svn: 173401
2013-01-25 08:20:39 +08:00
define void @foo6(float %a0, double %a1) nounwind {
entry:
[mips] Enable tail calls by default Enable tail calls by default for (micro)MIPS(64). microMIPS is slightly more tricky than doing it for MIPS(R6) or microMIPSR6. microMIPS has two instruction encodings: 16bit and 32bit along with some restrictions on the size of the instruction that can fill the delay slot. For safe tail calls for microMIPS, the delay slot filler attempts to find a correct size instruction for the delay slot of TAILCALL pseudos. Reviewers: dsanders, vkalintris Subscribers: jfb, dsanders, sdardis, llvm-commits Differential Revision: https://reviews.llvm.org/D21138 llvm-svn: 277708
2016-08-04 17:17:07 +08:00
call void @foo7(double %a1, float %a0) nounwind
[mips] Set flag neverHasSideEffects flag on some of the floating point instructions. llvm-svn: 173401
2013-01-25 08:20:39 +08:00
ret void
}
declare void @foo7(double, float)
[mips] Define class MemDefsUses. This class tracks dependence between memory instructions using underlying objects of memory operands. llvm-svn: 176313
2013-03-01 08:16:31 +08:00
; Check that a store can move past other memory instructions.
;
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 14:24:09 +08:00
; STATICO1-LABEL: foo8:
[mips] Define class MemDefsUses. This class tracks dependence between memory instructions using underlying objects of memory operands. llvm-svn: 176313
2013-03-01 08:16:31 +08:00
; STATICO1: jalr ${{[0-9]+}}
; STATICO1-NEXT: sw ${{[0-9]+}}, %lo(g1)
@foo9 = common global void ()* null, align 4
define i32 @foo8(i32 %a) nounwind {
entry:
store i32 %a, i32* @g1, align 4
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load void ()*, void ()** @foo9, align 4
[mips] Enable tail calls by default Enable tail calls by default for (micro)MIPS(64). microMIPS is slightly more tricky than doing it for MIPS(R6) or microMIPSR6. microMIPS has two instruction encodings: 16bit and 32bit along with some restrictions on the size of the instruction that can fill the delay slot. For safe tail calls for microMIPS, the delay slot filler attempts to find a correct size instruction for the delay slot of TAILCALL pseudos. Reviewers: dsanders, vkalintris Subscribers: jfb, dsanders, sdardis, llvm-commits Differential Revision: https://reviews.llvm.org/D21138 llvm-svn: 277708
2016-08-04 17:17:07 +08:00
call void %0() nounwind
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%1 = load i32, i32* @g1, align 4
[mips] Define class MemDefsUses. This class tracks dependence between memory instructions using underlying objects of memory operands. llvm-svn: 176313
2013-03-01 08:16:31 +08:00
%add = add nsw i32 %1, %a
ret i32 %add
}
[mips] Add capability to search in the forward direction for instructions that can fill the delay slot. Currently, this is off by default. llvm-svn: 176320
2013-03-01 08:50:52 +08:00
; Test searchForward. Check that the second jal's slot is filled with another
; instruction in the same block.
;
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 14:24:09 +08:00
; FORWARD-LABEL: foo10:
[mips] Add capability to search in the forward direction for instructions that can fill the delay slot. Currently, this is off by default. llvm-svn: 176320
2013-03-01 08:50:52 +08:00
; FORWARD: jal foo11
; FORWARD: jal foo11
; FORWARD-NOT: nop
[mips] Add the capability to search delay slot filling instructions in successor basic blocks. Currently this is off by default. llvm-svn: 176329
2013-03-01 10:03:51 +08:00
; FORWARD: end foo10
[mips] Add capability to search in the forward direction for instructions that can fill the delay slot. Currently, this is off by default. llvm-svn: 176320
2013-03-01 08:50:52 +08:00
define void @foo10() nounwind {
entry:
tail call void @foo11() nounwind
tail call void @foo11() nounwind
store i32 0, i32* @g1, align 4
tail call void @foo11() nounwind
store i32 0, i32* @g1, align 4
ret void
}
declare void @foo11()
[mips] Add the capability to search delay slot filling instructions in successor basic blocks. Currently this is off by default. llvm-svn: 176329
2013-03-01 10:03:51 +08:00
; Check that delay slots of branches in both the entry block and loop body are
; filled.
;
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 14:24:09 +08:00
; SUCCBB-LABEL: succbbs_loop1:
[mips] Add instruction selection patterns for blez and bgez. llvm-svn: 182396
2013-05-22 01:13:47 +08:00
; SUCCBB: blez $5, $BB
[mips] Add the capability to search delay slot filling instructions in successor basic blocks. Currently this is off by default. llvm-svn: 176329
2013-03-01 10:03:51 +08:00
; SUCCBB-NEXT: addiu
[mips] Print instructions "beq", "bne" and "or" using assembler pseudo instructions "beqz", "bnez" and "move", when possible. beq $2, $zero, $L1 => beqz $2, $L1 bne $2, $zero, $L1 => bnez $2, $L1 or $2, $3, $zero => move $2, $3 llvm-svn: 187229
2013-07-27 02:34:25 +08:00
; SUCCBB: bnez ${{[0-9]+}}, $BB
[mips] Add the capability to search delay slot filling instructions in successor basic blocks. Currently this is off by default. llvm-svn: 176329
2013-03-01 10:03:51 +08:00
; SUCCBB-NEXT: addiu
define i32 @succbbs_loop1(i32* nocapture %a, i32 %n) {
entry:
%cmp4 = icmp sgt i32 %n, 0
br i1 %cmp4, label %for.body, label %for.end
for.body: ; preds = %entry, %for.body
%s.06 = phi i32 [ %add, %for.body ], [ 0, %entry ]
%i.05 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction One of several parallel first steps to remove the target type of pointers, replacing them with a single opaque pointer type. This adds an explicit type parameter to the gep instruction so that when the first parameter becomes an opaque pointer type, the type to gep through is still available to the instructions. * This doesn't modify gep operators, only instructions (operators will be handled separately) * Textual IR changes only. Bitcode (including upgrade) and changing the in-memory representation will be in separate changes. * geps of vectors are transformed as: getelementptr <4 x float*> %x, ... ->getelementptr float, <4 x float*> %x, ... Then, once the opaque pointer type is introduced, this will ultimately look like: getelementptr float, <4 x ptr> %x with the unambiguous interpretation that it is a vector of pointers to float. * address spaces remain on the pointer, not the type: getelementptr float addrspace(1)* %x ->getelementptr float, float addrspace(1)* %x Then, eventually: getelementptr float, ptr addrspace(1) %x Importantly, the massive amount of test case churn has been automated by same crappy python code. I had to manually update a few test cases that wouldn't fit the script's model (r228970,r229196,r229197,r229198). The python script just massages stdin and writes the result to stdout, I then wrapped that in a shell script to handle replacing files, then using the usual find+xargs to migrate all the files. update.py: import fileinput import sys import re ibrep = re.compile(r"(^.*?[^%\w]getelementptr inbounds )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))") normrep = re.compile( r"(^.*?[^%\w]getelementptr )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))") def conv(match, line): if not match: return line line = match.groups()[0] if len(match.groups()[5]) == 0: line += match.groups()[2] line += match.groups()[3] line += ", " line += match.groups()[1] line += "\n" return line for line in sys.stdin: if line.find("getelementptr ") == line.find("getelementptr inbounds"): if line.find("getelementptr inbounds") != line.find("getelementptr inbounds ("): line = conv(re.match(ibrep, line), line) elif line.find("getelementptr ") != line.find("getelementptr ("): line = conv(re.match(normrep, line), line) sys.stdout.write(line) apply.sh: for name in "$@" do python3 `dirname "$0"`/update.py < "$name" > "$name.tmp" && mv "$name.tmp" "$name" rm -f "$name.tmp" done The actual commands: From llvm/src: find test/ -name *.ll | xargs ./apply.sh From llvm/src/tools/clang: find test/ -name *.mm -o -name *.m -o -name *.cpp -o -name *.c | xargs -I '{}' ../../apply.sh "{}" From llvm/src/tools/polly: find test/ -name *.ll | xargs ./apply.sh After that, check-all (with llvm, clang, clang-tools-extra, lld, compiler-rt, and polly all checked out). The extra 'rm' in the apply.sh script is due to a few files in clang's test suite using interesting unicode stuff that my python script was throwing exceptions on. None of those files needed to be migrated, so it seemed sufficient to ignore those cases. Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7636 llvm-svn: 230786
2015-02-28 03:29:02 +08:00
%arrayidx = getelementptr inbounds i32, i32* %a, i32 %i.05
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load i32, i32* %arrayidx, align 4
[mips] Add the capability to search delay slot filling instructions in successor basic blocks. Currently this is off by default. llvm-svn: 176329
2013-03-01 10:03:51 +08:00
%add = add nsw i32 %0, %s.06
%inc = add nsw i32 %i.05, 1
%exitcond = icmp eq i32 %inc, %n
br i1 %exitcond, label %for.end, label %for.body
for.end: ; preds = %for.body, %entry
%s.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ]
ret i32 %s.0.lcssa
}
; Check that the first branch has its slot filled.
;
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 14:24:09 +08:00
; SUCCBB-LABEL: succbbs_br1:
[mips] Print instructions "beq", "bne" and "or" using assembler pseudo instructions "beqz", "bnez" and "move", when possible. beq $2, $zero, $L1 => beqz $2, $L1 bne $2, $zero, $L1 => bnez $2, $L1 or $2, $3, $zero => move $2, $3 llvm-svn: 187229
2013-07-27 02:34:25 +08:00
; SUCCBB: beqz ${{[0-9]+}}, $BB
[mips] Make sure loads from lazy-binding entries do not get CSE'd or hoisted out of loops. Previously, two consecutive calls to function "func" would result in the following sequence of instructions: 1. load $16, %got(func)($gp) // load address of lazy-binding stub. 2. move $25, $16 3. jalr $25 // jump to lazy-binding stub. 4. nop 5. move $25, $16 6. jalr $25 // jump to lazy-binding stub again. With this patch, the second call directly jumps to func's address, bypassing the lazy-binding resolution routine: 1. load $25, %got(func)($gp) // load address of lazy-binding stub. 2. jalr $25 // jump to lazy-binding stub. 3. nop 4. load $25, %got(func)($gp) // load resolved address of func. 5. jalr $25 // directly jump to func. llvm-svn: 191591
2013-09-28 08:12:32 +08:00
; SUCCBB-NEXT: lw ${{[0-9]+}}, %got(foo101)(${{[0-9]+}})
define internal fastcc void @foo101() {
entry:
tail call void @foo100()
tail call void @foo100()
ret void
}
[mips] Add the capability to search delay slot filling instructions in successor basic blocks. Currently this is off by default. llvm-svn: 176329
2013-03-01 10:03:51 +08:00
define void @succbbs_br1(i32 %a) {
entry:
%tobool = icmp eq i32 %a, 0
br i1 %tobool, label %if.end, label %if.then
if.then: ; preds = %entry
[mips] Make sure loads from lazy-binding entries do not get CSE'd or hoisted out of loops. Previously, two consecutive calls to function "func" would result in the following sequence of instructions: 1. load $16, %got(func)($gp) // load address of lazy-binding stub. 2. move $25, $16 3. jalr $25 // jump to lazy-binding stub. 4. nop 5. move $25, $16 6. jalr $25 // jump to lazy-binding stub again. With this patch, the second call directly jumps to func's address, bypassing the lazy-binding resolution routine: 1. load $25, %got(func)($gp) // load address of lazy-binding stub. 2. jalr $25 // jump to lazy-binding stub. 3. nop 4. load $25, %got(func)($gp) // load resolved address of func. 5. jalr $25 // directly jump to func. llvm-svn: 191591
2013-09-28 08:12:32 +08:00
tail call fastcc void @foo101()
[mips] Add the capability to search delay slot filling instructions in successor basic blocks. Currently this is off by default. llvm-svn: 176329
2013-03-01 10:03:51 +08:00
br label %if.end
if.end: ; preds = %entry, %if.then
ret void
}
declare void @foo100()