maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir

Ignoring revisions in .git-blame-ignore-revs. Click here to bypass and see the normal blame view.

182 lines
4.1 KiB
Plaintext
Raw Normal View History

AMDGPU/GlobalISel: Manually RegBankSelect copies This was failng on any pre-assigned copy to the VCC bank. This is something of a workaround for the default implementation in getInstrMappingImpl, and how it treats copy-like operations in general. Copy-like operations are considered to only have one result register bank, rather than separate banks for each source like a normal instruction. To avoid potentially mishandling reg_sequence with impossible operand combinations, the generic implementation errors on impossible costs. If the bank was already assigned, is treated it as-if it were an unsatisfiable REG_SEQUENCE mapping. We really don't get any value from any of what getInstrMappingImpl tries to do for copies, so just directly emit the simple mapping we really want.
2020-02-21 03:00:56 +08:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=gfx908 -run-pass=regbankselect -regbankselect-fast -verify-machineinstrs %s -o - | FileCheck %s
# RUN: llc -march=amdgcn -mcpu=gfx908 -run-pass=regbankselect -regbankselect-greedy -verify-machineinstrs %s -o - | FileCheck %s
---
name: copy_s32_vgpr_to_vgpr
legalized: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: copy_s32_vgpr_to_vgpr
; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: $vgpr0 = COPY [[COPY]](s32)
%0:_(s32) = COPY $vgpr0
$vgpr0 = COPY %0
...
---
name: copy_s32_sgpr_to_sgpr
legalized: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: copy_s32_sgpr_to_sgpr
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: $sgpr0 = COPY [[COPY]](s32)
%0:_(s32) = COPY $sgpr0
$sgpr0 = COPY %0
...
---
name: copy_s32_sgpr_to_vgpr
legalized: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: copy_s32_sgpr_to_vgpr
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: $vgpr0 = COPY [[COPY]](s32)
%0:_(s32) = COPY $sgpr0
$vgpr0 = COPY %0
...
---
name: copy_s32_vgpr_to_agpr
legalized: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: copy_s32_vgpr_to_agpr
; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: $agpr0 = COPY [[COPY]](s32)
%0:_(s32) = COPY $vgpr0
$agpr0 = COPY %0
...
---
name: copy_s32_sgpr_to_agpr
legalized: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: copy_s32_sgpr_to_agpr
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: $agpr0 = COPY [[COPY]](s32)
%0:_(s32) = COPY $sgpr0
$agpr0 = COPY %0
...
---
name: copy_s32_agpr_to_vgpr
legalized: true
body: |
bb.0:
liveins: $agpr0
; CHECK-LABEL: name: copy_s32_agpr_to_vgpr
; CHECK: [[COPY:%[0-9]+]]:agpr(s32) = COPY $agpr0
; CHECK: $vgpr0 = COPY [[COPY]](s32)
%0:_(s32) = COPY $agpr0
$vgpr0 = COPY %0
...
---
name: copy_s32_agpr_to_agpr
legalized: true
body: |
bb.0:
liveins: $agpr0
; CHECK-LABEL: name: copy_s32_agpr_to_agpr
; CHECK: [[COPY:%[0-9]+]]:agpr(s32) = COPY $agpr0
; CHECK: $agpr0 = COPY [[COPY]](s32)
%0:_(s32) = COPY $agpr0
$agpr0 = COPY %0
...
---
name: copy_s1_sgpr_to_vcc_preassigned
legalized: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: copy_s1_sgpr_to_vcc_preassigned
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[TRUNC:%[0-9]+]]:sgpr(s1) = G_TRUNC [[COPY]](s32)
; CHECK: [[COPY1:%[0-9]+]]:vcc(s1) = COPY [[TRUNC]](s1)
; CHECK: S_ENDPGM 0, implicit [[COPY1]](s1)
%0:sgpr(s32) = COPY $sgpr0
%1:sgpr(s1) = G_TRUNC %0
%2:vcc(s1) = COPY %1
S_ENDPGM 0, implicit %2
...
---
name: copy_s1_vgpr_to_vcc_preassigned
legalized: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: copy_s1_vgpr_to_vcc_preassigned
; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: [[TRUNC:%[0-9]+]]:vgpr(s1) = G_TRUNC [[COPY]](s32)
; CHECK: [[COPY1:%[0-9]+]]:vcc(s1) = COPY [[TRUNC]](s1)
; CHECK: S_ENDPGM 0, implicit [[COPY1]](s1)
%0:vgpr(s32) = COPY $vgpr0
%1:vgpr(s1) = G_TRUNC %0
%2:vcc(s1) = COPY %1
S_ENDPGM 0, implicit %2
...
---
name: copy_s1_sgpr_to_vcc
legalized: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: copy_s1_sgpr_to_vcc
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[TRUNC:%[0-9]+]]:sgpr(s1) = G_TRUNC [[COPY]](s32)
; CHECK: [[COPY1:%[0-9]+]]:vcc(s1) = COPY [[TRUNC]](s1)
; CHECK: S_ENDPGM 0, implicit [[COPY1]](s1)
%0:_(s32) = COPY $sgpr0
%1:_(s1) = G_TRUNC %0
%2:vcc(s1) = COPY %1
S_ENDPGM 0, implicit %2
...
---
name: copy_s1_vgpr_to_vcc
legalized: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: copy_s1_vgpr_to_vcc
; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: [[TRUNC:%[0-9]+]]:vgpr(s1) = G_TRUNC [[COPY]](s32)
; CHECK: [[COPY1:%[0-9]+]]:vcc(s1) = COPY [[TRUNC]](s1)
; CHECK: S_ENDPGM 0, implicit [[COPY1]](s1)
%0:_(s32) = COPY $vgpr0
%1:_(s1) = G_TRUNC %0
%2:vcc(s1) = COPY %1
S_ENDPGM 0, implicit %2
...