forked from OSchip/llvm-project
293 lines
10 KiB
C++
293 lines
10 KiB
C++
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//=- WebAssemblyFixIrreducibleControlFlow.cpp - Fix irreducible control flow -//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// \brief This file implements a pass that transforms irreducible control flow
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/// into reducible control flow. Irreducible control flow means multiple-entry
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/// loops; they appear as CFG cycles that are not recorded in MachineLoopInfo
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/// due to being unnatural.
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///
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/// TODO: The transformation implemented here handles all irreducible control
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/// flow, without exponential code-size expansion, though it does so by creating
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/// inefficient code in many cases. Ideally, we should add other
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/// transformations, including code-duplicating cases, which can be more
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/// efficient in common cases, and they can fall back to this conservative
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/// implementation as needed.
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///
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//===----------------------------------------------------------------------===//
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#include "WebAssembly.h"
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#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
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#include "WebAssemblyMachineFunctionInfo.h"
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#include "WebAssemblySubtarget.h"
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#include "llvm/ADT/PriorityQueue.h"
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#include "llvm/ADT/SCCIterator.h"
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#include "llvm/ADT/SetVector.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineLoopInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define DEBUG_TYPE "wasm-fix-irreducible-control-flow"
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namespace {
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class WebAssemblyFixIrreducibleControlFlow final : public MachineFunctionPass {
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const char *getPassName() const override {
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return "WebAssembly Fix Irreducible Control Flow";
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesCFG();
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AU.addRequired<MachineDominatorTree>();
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AU.addPreserved<MachineDominatorTree>();
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AU.addRequired<MachineLoopInfo>();
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AU.addPreserved<MachineLoopInfo>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool runOnMachineFunction(MachineFunction &MF) override;
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bool VisitLoop(MachineFunction &MF, MachineLoopInfo &MLI, MachineLoop *Loop);
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public:
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static char ID; // Pass identification, replacement for typeid
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WebAssemblyFixIrreducibleControlFlow() : MachineFunctionPass(ID) {}
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};
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} // end anonymous namespace
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char WebAssemblyFixIrreducibleControlFlow::ID = 0;
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FunctionPass *llvm::createWebAssemblyFixIrreducibleControlFlow() {
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return new WebAssemblyFixIrreducibleControlFlow();
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}
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namespace {
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/// A utility for walking the blocks of a loop, handling a nested inner
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/// loop as a monolithic conceptual block.
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class MetaBlock {
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MachineBasicBlock *Block;
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SmallVector<MachineBasicBlock *, 2> Preds;
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SmallVector<MachineBasicBlock *, 2> Succs;
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public:
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explicit MetaBlock(MachineBasicBlock *MBB)
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: Block(MBB), Preds(MBB->pred_begin(), MBB->pred_end()),
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Succs(MBB->succ_begin(), MBB->succ_end()) {}
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explicit MetaBlock(MachineLoop *Loop) : Block(Loop->getHeader()) {
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Loop->getExitBlocks(Succs);
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for (MachineBasicBlock *Pred : Block->predecessors())
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if (!Loop->contains(Pred))
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Preds.push_back(Pred);
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}
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MachineBasicBlock *getBlock() const { return Block; }
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const SmallVectorImpl<MachineBasicBlock *> &predecessors() const {
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return Preds;
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}
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const SmallVectorImpl<MachineBasicBlock *> &successors() const {
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return Succs;
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}
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bool operator==(const MetaBlock &MBB) { return Block == MBB.Block; }
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bool operator!=(const MetaBlock &MBB) { return Block != MBB.Block; }
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};
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class SuccessorList : public MetaBlock {
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size_t Index;
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size_t Num;
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public:
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explicit SuccessorList(MachineBasicBlock *MBB)
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: MetaBlock(MBB), Index(0), Num(successors().size()) {}
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explicit SuccessorList(MachineLoop *Loop)
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: MetaBlock(Loop), Index(0), Num(successors().size()) {}
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bool HasNext() const { return Index != Num; }
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MachineBasicBlock *Next() {
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assert(HasNext());
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return successors()[Index++];
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}
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};
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} // end anonymous namespace
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bool WebAssemblyFixIrreducibleControlFlow::VisitLoop(MachineFunction &MF,
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MachineLoopInfo &MLI,
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MachineLoop *Loop) {
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MachineBasicBlock *Header = Loop ? Loop->getHeader() : &*MF.begin();
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SetVector<MachineBasicBlock *> RewriteSuccs;
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// DFS through Loop's body, looking for for irreducible control flow. Loop is
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// natural, and we stay in its body, and we treat any nested loops
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// monolithically, so any cycles we encounter indicate irreducibility.
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SmallPtrSet<MachineBasicBlock *, 8> OnStack;
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SmallPtrSet<MachineBasicBlock *, 8> Visited;
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SmallVector<SuccessorList, 4> LoopWorklist;
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LoopWorklist.push_back(SuccessorList(Header));
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OnStack.insert(Header);
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Visited.insert(Header);
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while (!LoopWorklist.empty()) {
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SuccessorList &Top = LoopWorklist.back();
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if (Top.HasNext()) {
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MachineBasicBlock *Next = Top.Next();
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if (Next == Header || (Loop && !Loop->contains(Next)))
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continue;
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if (LLVM_LIKELY(OnStack.insert(Next).second)) {
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if (!Visited.insert(Next).second) {
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OnStack.erase(Next);
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continue;
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}
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MachineLoop *InnerLoop = MLI.getLoopFor(Next);
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if (InnerLoop != Loop)
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LoopWorklist.push_back(SuccessorList(InnerLoop));
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else
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LoopWorklist.push_back(SuccessorList(Next));
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} else {
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RewriteSuccs.insert(Top.getBlock());
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}
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continue;
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}
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OnStack.erase(Top.getBlock());
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LoopWorklist.pop_back();
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}
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// Most likely, we didn't find any irreducible control flow.
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if (LLVM_LIKELY(RewriteSuccs.empty()))
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return false;
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DEBUG(dbgs() << "Irreducible control flow detected!\n");
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// Ok. We have irreducible control flow! Create a dispatch block which will
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// contains a jump table to any block in the problematic set of blocks.
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MachineBasicBlock *Dispatch = MF.CreateMachineBasicBlock();
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MF.insert(MF.end(), Dispatch);
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MLI.changeLoopFor(Dispatch, Loop);
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// Add the jump table.
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const auto &TII = *MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
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MachineInstrBuilder MIB = BuildMI(*Dispatch, Dispatch->end(), DebugLoc(),
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TII.get(WebAssembly::BR_TABLE_I32));
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// Add the register which will be used to tell the jump table which block to
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// jump to.
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MachineRegisterInfo &MRI = MF.getRegInfo();
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unsigned Reg = MRI.createVirtualRegister(&WebAssembly::I32RegClass);
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MIB.addReg(Reg);
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// Collect all the blocks which need to have their successors rewritten,
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// add the successors to the jump table, and remember their index.
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DenseMap<MachineBasicBlock *, unsigned> Indices;
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SmallVector<MachineBasicBlock *, 4> SuccWorklist(RewriteSuccs.begin(),
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RewriteSuccs.end());
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while (!SuccWorklist.empty()) {
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MachineBasicBlock *MBB = SuccWorklist.pop_back_val();
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auto Pair = Indices.insert(std::make_pair(MBB, 0));
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if (!Pair.second)
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continue;
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unsigned Index = MIB.getInstr()->getNumOperands() - 1;
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DEBUG(dbgs() << "MBB#" << MBB->getNumber() << " has index " << Index
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<< "\n");
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Pair.first->second = Index;
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for (auto Pred : MBB->predecessors())
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RewriteSuccs.insert(Pred);
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MIB.addMBB(MBB);
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Dispatch->addSuccessor(MBB);
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MetaBlock Meta(MBB);
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for (auto *Succ : Meta.successors())
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if (Succ != Header && (!Loop || Loop->contains(Succ)))
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SuccWorklist.push_back(Succ);
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}
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// Rewrite the problematic successors for every block in RewriteSuccs.
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// For simplicity, we just introduce a new block for every edge we need to
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// rewrite. Fancier things are possible.
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for (MachineBasicBlock *MBB : RewriteSuccs) {
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DenseMap<MachineBasicBlock *, MachineBasicBlock *> Map;
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for (auto *Succ : MBB->successors()) {
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if (!Indices.count(Succ))
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continue;
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MachineBasicBlock *Split = MF.CreateMachineBasicBlock();
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MF.insert(MBB->isLayoutSuccessor(Succ) ? MachineFunction::iterator(Succ)
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: MF.end(),
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Split);
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MLI.changeLoopFor(Split, Loop);
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// Set the jump table's register of the index of the block we wish to
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// jump to, and jump to the jump table.
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BuildMI(*Split, Split->end(), DebugLoc(), TII.get(WebAssembly::CONST_I32),
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Reg)
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.addImm(Indices[Succ]);
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BuildMI(*Split, Split->end(), DebugLoc(), TII.get(WebAssembly::BR))
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.addMBB(Dispatch);
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Split->addSuccessor(Dispatch);
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Map[Succ] = Split;
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}
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// Remap the terminator operands and the successor list.
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for (MachineInstr &Term : MBB->terminators())
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for (auto &Op : Term.explicit_uses())
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if (Op.isMBB() && Indices.count(Op.getMBB()))
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Op.setMBB(Map[Op.getMBB()]);
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for (auto Rewrite : Map)
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MBB->replaceSuccessor(Rewrite.first, Rewrite.second);
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}
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// Create a fake default label, because br_table requires one.
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MIB.addMBB(MIB.getInstr()
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->getOperand(MIB.getInstr()->getNumExplicitOperands() - 1)
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.getMBB());
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return true;
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}
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bool WebAssemblyFixIrreducibleControlFlow::runOnMachineFunction(
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MachineFunction &MF) {
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DEBUG(dbgs() << "********** Fixing Irreducible Control Flow **********\n"
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"********** Function: "
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<< MF.getName() << '\n');
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bool Changed = false;
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auto &MLI = getAnalysis<MachineLoopInfo>();
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// Visit the function body, which is identified as a null loop.
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Changed |= VisitLoop(MF, MLI, nullptr);
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// Visit all the loops.
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SmallVector<MachineLoop *, 8> Worklist(MLI.begin(), MLI.end());
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while (!Worklist.empty()) {
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MachineLoop *CurLoop = Worklist.pop_back_val();
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Worklist.append(CurLoop->begin(), CurLoop->end());
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Changed |= VisitLoop(MF, MLI, CurLoop);
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}
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// If we made any changes, completely recompute everything.
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if (LLVM_UNLIKELY(Changed)) {
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DEBUG(dbgs() << "Recomputing dominators and loops.\n");
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MF.getRegInfo().invalidateLiveness();
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MF.RenumberBlocks();
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getAnalysis<MachineDominatorTree>().runOnMachineFunction(MF);
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MLI.runOnMachineFunction(MF);
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}
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return Changed;
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}
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