forked from OSchip/llvm-project
74 lines
1.8 KiB
LLVM
74 lines
1.8 KiB
LLVM
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; RUN: llc < %s | FileCheck %s
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target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-pc-windows-msvc"
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declare i32 @__CxxFrameHandler3(...)
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declare void @throw() noreturn uwtable
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declare i8* @getval()
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define i8* @reload_out_of_pad(i8* %arg) #0 personality i32 (...)* @__CxxFrameHandler3 {
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assertPassed:
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invoke void @throw()
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to label %unreachable unwind label %catch.dispatch
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catch:
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%cp = catchpad within %cs [i8* null, i32 0, i8* null]
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catchret from %cp to label %return
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; This block *must* appear after the catchret to test the bug.
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; FIXME: Make this an MIR test so we can control MBB layout.
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unreachable:
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unreachable
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catch.dispatch:
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%cs = catchswitch within none [label %catch] unwind to caller
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return:
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ret i8* %arg
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}
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; CHECK-LABEL: reload_out_of_pad: # @reload_out_of_pad
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; CHECK: movq %rcx, -[[arg_slot:[0-9]+]](%rbp) # 8-byte Spill
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; CHECK: callq throw
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; CHECK: ud2
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; CHECK: movq -[[arg_slot]](%rbp), %rax # 8-byte Reload
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; CHECK: retq
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; CHECK: "?catch$3@?0?reload_out_of_pad@4HA":
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; CHECK-NOT: Reload
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; CHECK: retq
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define i8* @spill_in_pad() #0 personality i32 (...)* @__CxxFrameHandler3 {
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assertPassed:
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invoke void @throw()
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to label %unreachable unwind label %catch.dispatch
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catch:
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%cp = catchpad within %cs [i8* null, i32 0, i8* null]
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%val = call i8* @getval() [ "funclet"(token %cp) ]
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catchret from %cp to label %return
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unreachable:
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unreachable
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catch.dispatch:
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%cs = catchswitch within none [label %catch] unwind to caller
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return:
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ret i8* %val
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}
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; CHECK-LABEL: spill_in_pad: # @spill_in_pad
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; CHECK: callq throw
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; CHECK: ud2
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; CHECK: movq -[[val_slot:[0-9]+]](%rbp), %rax # 8-byte Reload
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; CHECK: retq
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; CHECK: "?catch$3@?0?spill_in_pad@4HA":
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; CHECK: callq getval
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; CHECK: movq %rax, -[[val_slot]](%rbp) # 8-byte Spill
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; CHECK: retq
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attributes #0 = { uwtable }
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