2015-11-26 00:55:01 +08:00
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//===-- WebAssemblyPeephole.cpp - WebAssembly Peephole Optimiztions -------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// \brief Late peephole optimizations for WebAssembly.
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///
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
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2016-05-21 08:21:56 +08:00
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#include "WebAssembly.h"
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2015-11-26 00:55:01 +08:00
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#include "WebAssemblyMachineFunctionInfo.h"
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2016-01-26 12:01:11 +08:00
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#include "WebAssemblySubtarget.h"
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#include "llvm/Analysis/TargetLibraryInfo.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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2015-11-26 00:55:01 +08:00
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using namespace llvm;
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#define DEBUG_TYPE "wasm-peephole"
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2016-05-21 08:21:56 +08:00
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static cl::opt<bool> DisableWebAssemblyFallthroughReturnOpt(
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"disable-wasm-fallthrough-return-opt", cl::Hidden,
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cl::desc("WebAssembly: Disable fallthrough-return optimizations."),
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cl::init(false));
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2015-11-26 00:55:01 +08:00
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namespace {
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class WebAssemblyPeephole final : public MachineFunctionPass {
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const char *getPassName() const override {
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return "WebAssembly late peephole optimizer";
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}
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2015-12-10 22:12:04 +08:00
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesCFG();
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AU.addRequired<TargetLibraryInfoWrapperPass>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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2015-11-26 00:55:01 +08:00
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bool runOnMachineFunction(MachineFunction &MF) override;
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public:
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static char ID;
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WebAssemblyPeephole() : MachineFunctionPass(ID) {}
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};
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} // end anonymous namespace
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char WebAssemblyPeephole::ID = 0;
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FunctionPass *llvm::createWebAssemblyPeephole() {
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return new WebAssemblyPeephole();
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}
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2016-05-18 07:19:03 +08:00
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/// If desirable, rewrite NewReg to a drop register.
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static bool MaybeRewriteToDrop(unsigned OldReg, unsigned NewReg,
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MachineOperand &MO, WebAssemblyFunctionInfo &MFI,
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MachineRegisterInfo &MRI) {
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bool Changed = false;
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if (OldReg == NewReg) {
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Changed = true;
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unsigned NewReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg));
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MO.setReg(NewReg);
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MO.setIsDead();
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MFI.stackifyVReg(NewReg);
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}
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return Changed;
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}
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static bool MaybeRewriteToFallthrough(MachineInstr &MI, MachineBasicBlock &MBB,
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const MachineFunction &MF,
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WebAssemblyFunctionInfo &MFI,
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MachineRegisterInfo &MRI,
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const WebAssemblyInstrInfo &TII,
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unsigned FallthroughOpc,
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unsigned CopyLocalOpc) {
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if (DisableWebAssemblyFallthroughReturnOpt)
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return false;
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if (&MBB != &MF.back())
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return false;
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if (&MI != &MBB.back())
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return false;
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// If the operand isn't stackified, insert a COPY_LOCAL to read the operand
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// and stackify it.
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MachineOperand &MO = MI.getOperand(0);
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unsigned Reg = MO.getReg();
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if (!MFI.isVRegStackified(Reg)) {
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unsigned NewReg = MRI.createVirtualRegister(MRI.getRegClass(Reg));
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BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(CopyLocalOpc), NewReg)
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.addReg(Reg);
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MO.setReg(NewReg);
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MFI.stackifyVReg(NewReg);
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}
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// Rewrite the return.
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MI.setDesc(TII.get(FallthroughOpc));
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return true;
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}
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bool WebAssemblyPeephole::runOnMachineFunction(MachineFunction &MF) {
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DEBUG({
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dbgs() << "********** Peephole **********\n"
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<< "********** Function: " << MF.getName() << '\n';
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});
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MachineRegisterInfo &MRI = MF.getRegInfo();
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WebAssemblyFunctionInfo &MFI = *MF.getInfo<WebAssemblyFunctionInfo>();
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const auto &Subtarget = MF.getSubtarget<WebAssemblySubtarget>();
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const auto &TII = *Subtarget.getInstrInfo();
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const WebAssemblyTargetLowering &TLI =
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*MF.getSubtarget<WebAssemblySubtarget>().getTargetLowering();
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auto &LibInfo = getAnalysis<TargetLibraryInfoWrapperPass>().getTLI();
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bool Changed = false;
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for (auto &MBB : MF)
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for (auto &MI : MBB)
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switch (MI.getOpcode()) {
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default:
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break;
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case WebAssembly::STORE8_I32:
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case WebAssembly::STORE16_I32:
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case WebAssembly::STORE8_I64:
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case WebAssembly::STORE16_I64:
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case WebAssembly::STORE32_I64:
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case WebAssembly::STORE_F32:
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case WebAssembly::STORE_F64:
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case WebAssembly::STORE_I32:
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case WebAssembly::STORE_I64: {
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// Store instructions return their value operand. If we ended up using
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// the same register for both, replace it with a dead def so that it
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// can use $drop instead.
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MachineOperand &MO = MI.getOperand(0);
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unsigned OldReg = MO.getReg();
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unsigned NewReg =
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MI.getOperand(WebAssembly::StoreValueOperandNo).getReg();
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Changed |= MaybeRewriteToDrop(OldReg, NewReg, MO, MFI, MRI);
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break;
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}
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case WebAssembly::CALL_I32:
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case WebAssembly::CALL_I64: {
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MachineOperand &Op1 = MI.getOperand(1);
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if (Op1.isSymbol()) {
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StringRef Name(Op1.getSymbolName());
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if (Name == TLI.getLibcallName(RTLIB::MEMCPY) ||
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Name == TLI.getLibcallName(RTLIB::MEMMOVE) ||
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Name == TLI.getLibcallName(RTLIB::MEMSET)) {
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LibFunc::Func Func;
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if (LibInfo.getLibFunc(Name, Func)) {
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const auto &Op2 = MI.getOperand(2);
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if (!Op2.isReg())
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report_fatal_error("Peephole: call to builtin function with "
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"wrong signature, not consuming reg");
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MachineOperand &MO = MI.getOperand(0);
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unsigned OldReg = MO.getReg();
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unsigned NewReg = Op2.getReg();
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2016-01-27 06:47:43 +08:00
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2016-05-20 05:07:20 +08:00
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if (MRI.getRegClass(NewReg) != MRI.getRegClass(OldReg))
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report_fatal_error("Peephole: call to builtin function with "
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"wrong signature, from/to mismatch");
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Changed |= MaybeRewriteToDrop(OldReg, NewReg, MO, MFI, MRI);
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}
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}
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2015-11-26 00:55:01 +08:00
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}
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break;
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}
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// Optimize away an explicit void return at the end of the function.
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case WebAssembly::RETURN_I32:
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Changed |= MaybeRewriteToFallthrough(
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MI, MBB, MF, MFI, MRI, TII, WebAssembly::FALLTHROUGH_RETURN_I32,
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WebAssembly::COPY_LOCAL_I32);
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break;
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case WebAssembly::RETURN_I64:
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Changed |= MaybeRewriteToFallthrough(
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MI, MBB, MF, MFI, MRI, TII, WebAssembly::FALLTHROUGH_RETURN_I64,
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WebAssembly::COPY_LOCAL_I64);
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break;
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case WebAssembly::RETURN_F32:
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Changed |= MaybeRewriteToFallthrough(
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MI, MBB, MF, MFI, MRI, TII, WebAssembly::FALLTHROUGH_RETURN_F32,
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WebAssembly::COPY_LOCAL_F32);
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break;
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case WebAssembly::RETURN_F64:
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Changed |= MaybeRewriteToFallthrough(
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MI, MBB, MF, MFI, MRI, TII, WebAssembly::FALLTHROUGH_RETURN_F64,
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WebAssembly::COPY_LOCAL_F64);
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break;
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case WebAssembly::RETURN_v16i8:
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Changed |=
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Subtarget.hasSIMD128() &&
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MaybeRewriteToFallthrough(MI, MBB, MF, MFI, MRI, TII,
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WebAssembly::FALLTHROUGH_RETURN_v16i8,
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WebAssembly::COPY_LOCAL_V128);
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break;
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case WebAssembly::RETURN_v8i16:
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Changed |=
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Subtarget.hasSIMD128() &&
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MaybeRewriteToFallthrough(MI, MBB, MF, MFI, MRI, TII,
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WebAssembly::FALLTHROUGH_RETURN_v8i16,
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WebAssembly::COPY_LOCAL_V128);
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break;
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case WebAssembly::RETURN_v4i32:
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Changed |=
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Subtarget.hasSIMD128() &&
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MaybeRewriteToFallthrough(MI, MBB, MF, MFI, MRI, TII,
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WebAssembly::FALLTHROUGH_RETURN_v4i32,
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WebAssembly::COPY_LOCAL_V128);
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break;
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case WebAssembly::RETURN_v4f32:
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Changed |=
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Subtarget.hasSIMD128() &&
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MaybeRewriteToFallthrough(MI, MBB, MF, MFI, MRI, TII,
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WebAssembly::FALLTHROUGH_RETURN_v4f32,
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WebAssembly::COPY_LOCAL_V128);
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break;
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case WebAssembly::RETURN_VOID:
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if (!DisableWebAssemblyFallthroughReturnOpt &&
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&MBB == &MF.back() && &MI == &MBB.back())
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MI.setDesc(TII.get(WebAssembly::FALLTHROUGH_RETURN_VOID));
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break;
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}
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return Changed;
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}
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