2018-01-05 22:24:03 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
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2008-02-21 15:42:26 +08:00
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2009-07-12 08:46:16 +08:00
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define void @handle_vector_size_attribute() nounwind {
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2018-01-05 22:24:03 +08:00
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; CHECK-LABEL: handle_vector_size_attribute:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movl 0, %eax
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; CHECK-NEXT: decl %eax
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Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
Summary:
Two utils methods have essentially the same functionality. This is an attempt to merge them into one.
1. lib/Transforms/Utils/Local.cpp : MergeBasicBlockIntoOnlyPred
2. lib/Transforms/Utils/BasicBlockUtils.cpp : MergeBlockIntoPredecessor
Prior to the patch:
1. MergeBasicBlockIntoOnlyPred
Updates either DomTree or DeferredDominance
Moves all instructions from Pred to BB, deletes Pred
Asserts BB has single predecessor
If address was taken, replace the block address with constant 1 (?)
2. MergeBlockIntoPredecessor
Updates DomTree, LoopInfo and MemoryDependenceResults
Moves all instruction from BB to Pred, deletes BB
Returns if doesn't have a single predecessor
Returns if BB's address was taken
After the patch:
Method 2. MergeBlockIntoPredecessor is attempting to become the new default:
Updates DomTree or DeferredDominance, and LoopInfo and MemoryDependenceResults
Moves all instruction from BB to Pred, deletes BB
Returns if doesn't have a single predecessor
Returns if BB's address was taken
Uses of MergeBasicBlockIntoOnlyPred that need to be replaced:
1. lib/Transforms/Scalar/LoopSimplifyCFG.cpp
Updated in this patch. No challenges.
2. lib/CodeGen/CodeGenPrepare.cpp
Updated in this patch.
i. eliminateFallThrough is straightforward, but I added using a temporary array to avoid the iterator invalidation.
ii. eliminateMostlyEmptyBlock(s) methods also now use a temporary array for blocks
Some interesting aspects:
- Since Pred is not deleted (BB is), the entry block does not need updating.
- The entry block was being updated with the deleted block in eliminateMostlyEmptyBlock. Added assert to make obvious that BB=SinglePred.
- isMergingEmptyBlockProfitable assumes BB is the one to be deleted.
- eliminateMostlyEmptyBlock(BB) does not delete BB on one path, it deletes its unique predecessor instead.
- adding some test owner as subscribers for the interesting tests modified:
test/CodeGen/X86/avx-cmp.ll
test/CodeGen/AMDGPU/nested-loop-conditions.ll
test/CodeGen/AMDGPU/si-annotate-cf.ll
test/CodeGen/X86/hoist-spill.ll
test/CodeGen/X86/2006-11-17-IllegalMove.ll
3. lib/Transforms/Scalar/JumpThreading.cpp
Not covered in this patch. It is the only use case using the DeferredDominance.
I would defer to Brian Rzycki to make this replacement.
Reviewers: chandlerc, spatel, davide, brzycki, bkramer, javed.absar
Subscribers: qcolombet, sanjoy, nemanjai, nhaehnle, jlebar, tpr, kbarton, RKSimon, wmi, arsenm, llvm-commits
Differential Revision: https://reviews.llvm.org/D48202
llvm-svn: 335183
2018-06-21 06:01:04 +08:00
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; CHECK-NEXT: cmpl $1, %eax
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; CHECK-NEXT: ja .LBB0_2
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; CHECK-NEXT: # %bb.1: # %bb77
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2018-01-05 22:24:03 +08:00
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; CHECK-NEXT: movb 0, %al
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2019-03-26 02:51:57 +08:00
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; CHECK-NEXT: movb 0, %al
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testb %al, %al
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2018-01-05 22:24:03 +08:00
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; CHECK-NEXT: .LBB0_2: # %bb84
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; CHECK-NEXT: retq
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2006-11-18 04:41:55 +08:00
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entry:
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2015-02-28 05:17:42 +08:00
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%tmp69 = load i32, i32* null ; <i32> [#uses=1]
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2008-02-21 15:42:26 +08:00
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switch i32 %tmp69, label %bb84 [
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i32 2, label %bb77
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i32 1, label %bb77
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2006-11-18 04:41:55 +08:00
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]
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bb77: ; preds = %entry, %entry
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2008-02-21 15:42:26 +08:00
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%tmp99 = udiv i64 0, 0 ; <i64> [#uses=1]
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2018-08-25 22:16:03 +08:00
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%tmp = load volatile i8, i8* null ; <i8> [#uses=1]
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2008-02-21 15:42:26 +08:00
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%tmp114 = icmp eq i64 0, 0 ; <i1> [#uses=1]
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2010-06-24 23:04:11 +08:00
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br label %cond_true115
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2006-11-18 04:41:55 +08:00
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bb84: ; preds = %entry
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ret void
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cond_true115: ; preds = %bb77
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2018-08-25 22:16:03 +08:00
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%tmp118 = load volatile i8, i8* null ; <i8> [#uses=1]
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2010-06-24 23:04:11 +08:00
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br label %cond_true120
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2006-11-18 04:41:55 +08:00
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cond_true120: ; preds = %cond_true115
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2008-02-21 15:42:26 +08:00
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%tmp127 = udiv i8 %tmp, %tmp118 ; <i8> [#uses=1]
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%tmp127.upgrd.1 = zext i8 %tmp127 to i64 ; <i64> [#uses=1]
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2006-11-18 04:41:55 +08:00
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br label %cond_next129
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cond_next129: ; preds = %cond_true120, %cond_true115
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2010-06-24 23:04:11 +08:00
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%iftmp.30.0 = phi i64 [ %tmp127.upgrd.1, %cond_true120 ] ; <i64> [#uses=1]
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2008-02-21 15:42:26 +08:00
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%tmp132 = icmp eq i64 %iftmp.30.0, %tmp99 ; <i1> [#uses=1]
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br i1 %tmp132, label %cond_false148, label %cond_next136
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2006-11-18 04:41:55 +08:00
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cond_next136: ; preds = %cond_next129, %bb77
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ret void
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cond_false148: ; preds = %cond_next129
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ret void
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}
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