forked from OSchip/llvm-project
43 lines
1.4 KiB
LLVM
43 lines
1.4 KiB
LLVM
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; RUN: llc < %s | FileCheck %s
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; ModuleID = 'aarch64_tree_tests.bc'
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target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
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target triple = "arm64--linux-gnu"
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; CHECK-LABLE: @aarch64_tree_tests_and
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; CHECK: .hword 32768
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; CHECK: .hword 32767
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; CHECK: .hword 4664
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; CHECK: .hword 32767
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; CHECK: .hword 32768
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; CHECK: .hword 32768
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; CHECK: .hword 0
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; CHECK: .hword 0
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; Function Attrs: nounwind readnone
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define <8 x i16> @aarch64_tree_tests_and(<8 x i16> %a) {
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entry:
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%and = and <8 x i16> <i16 0, i16 undef, i16 undef, i16 0, i16 0, i16 undef, i16 undef, i16 0>, %a
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%ret = add <8 x i16> %and, <i16 -32768, i16 32767, i16 4664, i16 32767, i16 -32768, i16 -32768, i16 0, i16 0>
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ret <8 x i16> %ret
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}
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; CHECK-LABLE: @aarch64_tree_tests_or
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; CHECK: .hword 32768
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; CHECK: .hword 32766
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; CHECK: .hword 4664
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; CHECK: .hword 32766
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; CHECK: .hword 32768
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; CHECK: .hword 32768
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; CHECK: .hword 65535
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; CHECK: .hword 65535
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; Function Attrs: nounwind readnone
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define <8 x i16> @aarch64_tree_tests_or(<8 x i16> %a) {
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entry:
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%or = or <8 x i16> <i16 -1, i16 undef, i16 undef, i16 -1, i16 -1, i16 undef, i16 undef, i16 -1>, %a
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%ret = add <8 x i16> %or, <i16 -32767, i16 32767, i16 4665, i16 32767, i16 -32767, i16 -32767, i16 0, i16 0>
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ret <8 x i16> %ret
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}
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