2017-10-18 05:27:42 +08:00
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//===- LoadStoreVectorizer.cpp - GPU Load & Store Vectorizer --------------===//
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2016-07-01 07:11:38 +08:00
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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2018-01-10 11:02:12 +08:00
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//
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// This pass merges loads/stores to/from sequential memory addresses into vector
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// loads/stores. Although there's nothing GPU-specific in here, this pass is
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// motivated by the microarchitectural quirks of nVidia and AMD GPUs.
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//
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// (For simplicity below we talk about loads only, but everything also applies
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// to stores.)
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//
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// This pass is intended to be run late in the pipeline, after other
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// vectorization opportunities have been exploited. So the assumption here is
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// that immediately following our new vector load we'll need to extract out the
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// individual elements of the load, so we can operate on them individually.
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//
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// On CPUs this transformation is usually not beneficial, because extracting the
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// elements of a vector register is expensive on most architectures. It's
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// usually better just to load each element individually into its own scalar
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// register.
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//
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// However, nVidia and AMD GPUs don't have proper vector registers. Instead, a
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// "vector load" loads directly into a series of scalar registers. In effect,
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// extracting the elements of the vector is free. It's therefore always
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// beneficial to vectorize a sequence of loads on these architectures.
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//
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// Vectorizing (perhaps a better name might be "coalescing") loads can have
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// large performance impacts on GPU kernels, and opportunities for vectorizing
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// are common in GPU code. This pass tries very hard to find such
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// opportunities; its runtime is quadratic in the number of loads in a BB.
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//
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// Some CPU architectures, such as ARM, have instructions that load into
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// multiple scalar registers, similar to a GPU vectorized load. In theory ARM
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// could use this pass (with some modifications), but currently it implements
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// its own pass to do something similar to what we do here.
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2016-07-01 07:11:38 +08:00
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2017-10-18 05:27:42 +08:00
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#include "llvm/ADT/APInt.h"
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#include "llvm/ADT/ArrayRef.h"
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2016-07-01 07:11:38 +08:00
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#include "llvm/ADT/MapVector.h"
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#include "llvm/ADT/PostOrderIterator.h"
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2017-10-18 05:27:42 +08:00
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/ADT/SmallVector.h"
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2016-07-01 07:11:38 +08:00
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#include "llvm/ADT/Statistic.h"
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2017-10-18 05:27:42 +08:00
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#include "llvm/ADT/iterator_range.h"
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2016-07-01 07:11:38 +08:00
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#include "llvm/Analysis/AliasAnalysis.h"
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2017-10-18 05:27:42 +08:00
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#include "llvm/Analysis/MemoryLocation.h"
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2016-08-13 08:04:08 +08:00
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#include "llvm/Analysis/OrderedBasicBlock.h"
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2016-07-01 07:11:38 +08:00
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#include "llvm/Analysis/ScalarEvolution.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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2018-06-05 05:23:21 +08:00
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#include "llvm/Transforms/Utils/Local.h"
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2016-07-01 07:11:38 +08:00
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/Analysis/VectorUtils.h"
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2017-10-18 05:27:42 +08:00
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#include "llvm/IR/Attributes.h"
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#include "llvm/IR/BasicBlock.h"
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#include "llvm/IR/Constants.h"
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2016-07-01 07:11:38 +08:00
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#include "llvm/IR/DataLayout.h"
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2017-10-18 05:27:42 +08:00
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#include "llvm/IR/DerivedTypes.h"
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2016-07-01 07:11:38 +08:00
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#include "llvm/IR/Dominators.h"
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2017-10-18 05:27:42 +08:00
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#include "llvm/IR/Function.h"
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2016-07-01 07:11:38 +08:00
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#include "llvm/IR/IRBuilder.h"
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2017-10-18 05:27:42 +08:00
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#include "llvm/IR/InstrTypes.h"
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#include "llvm/IR/Instruction.h"
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2016-07-01 07:11:38 +08:00
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#include "llvm/IR/Instructions.h"
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Add an @llvm.sideeffect intrinsic
This patch implements Chandler's idea [0] for supporting languages that
require support for infinite loops with side effects, such as Rust, providing
part of a solution to bug 965 [1].
Specifically, it adds an `llvm.sideeffect()` intrinsic, which has no actual
effect, but which appears to optimization passes to have obscure side effects,
such that they don't optimize away loops containing it. It also teaches
several optimization passes to ignore this intrinsic, so that it doesn't
significantly impact optimization in most cases.
As discussed on llvm-dev [2], this patch is the first of two major parts.
The second part, to change LLVM's semantics to have defined behavior
on infinite loops by default, with a function attribute for opting into
potential-undefined-behavior, will be implemented and posted for review in
a separate patch.
[0] http://lists.llvm.org/pipermail/llvm-dev/2015-July/088103.html
[1] https://bugs.llvm.org/show_bug.cgi?id=965
[2] http://lists.llvm.org/pipermail/llvm-dev/2017-October/118632.html
Differential Revision: https://reviews.llvm.org/D38336
llvm-svn: 317729
2017-11-09 05:59:51 +08:00
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#include "llvm/IR/IntrinsicInst.h"
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2016-07-01 07:11:38 +08:00
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#include "llvm/IR/Module.h"
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#include "llvm/IR/Type.h"
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2017-10-18 05:27:42 +08:00
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#include "llvm/IR/User.h"
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2016-07-01 07:11:38 +08:00
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#include "llvm/IR/Value.h"
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2017-10-18 05:27:42 +08:00
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#include "llvm/Pass.h"
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#include "llvm/Support/Casting.h"
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2016-07-01 07:11:38 +08:00
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#include "llvm/Support/Debug.h"
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2017-04-27 00:39:58 +08:00
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#include "llvm/Support/KnownBits.h"
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2017-10-18 05:27:42 +08:00
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#include "llvm/Support/MathExtras.h"
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2016-07-01 07:11:38 +08:00
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#include "llvm/Support/raw_ostream.h"
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2016-07-08 04:10:35 +08:00
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#include "llvm/Transforms/Vectorize.h"
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2017-10-18 05:27:42 +08:00
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#include <algorithm>
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#include <cassert>
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#include <cstdlib>
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#include <tuple>
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#include <utility>
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2016-07-01 07:11:38 +08:00
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using namespace llvm;
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#define DEBUG_TYPE "load-store-vectorizer"
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2017-10-18 05:27:42 +08:00
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2016-07-01 07:11:38 +08:00
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STATISTIC(NumVectorInstructions, "Number of vector accesses generated");
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STATISTIC(NumScalarsVectorized, "Number of scalar accesses vectorized");
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2016-08-05 00:38:44 +08:00
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// FIXME: Assuming stack alignment of 4 is always good enough
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static const unsigned StackAdjustedAlignment = 4;
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2017-10-18 05:27:42 +08:00
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namespace {
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|
2018-07-26 05:33:00 +08:00
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/// ChainID is an arbitrary token that is allowed to be different only for the
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/// accesses that are guaranteed to be considered non-consecutive by
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/// Vectorizer::isConsecutiveAccess. It's used for grouping instructions
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/// together and reducing the number of instructions the main search operates on
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/// at a time, i.e. this is to reduce compile time and nothing else as the main
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/// search has O(n^2) time complexity. The underlying type of ChainID should not
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/// be relied upon.
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using ChainID = const Value *;
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2017-10-18 05:27:42 +08:00
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using InstrList = SmallVector<Instruction *, 8>;
|
2018-07-26 05:33:00 +08:00
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using InstrListMap = MapVector<ChainID, InstrList>;
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2016-07-01 07:11:38 +08:00
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2016-07-20 07:19:16 +08:00
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class Vectorizer {
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2016-07-01 07:11:38 +08:00
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Function &F;
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AliasAnalysis &AA;
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DominatorTree &DT;
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ScalarEvolution &SE;
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2016-07-01 10:07:22 +08:00
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TargetTransformInfo &TTI;
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2016-07-01 07:11:38 +08:00
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const DataLayout &DL;
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IRBuilder<> Builder;
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public:
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Vectorizer(Function &F, AliasAnalysis &AA, DominatorTree &DT,
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2016-07-01 10:07:22 +08:00
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ScalarEvolution &SE, TargetTransformInfo &TTI)
|
2016-07-08 04:10:35 +08:00
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: F(F), AA(AA), DT(DT), SE(SE), TTI(TTI),
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DL(F.getParent()->getDataLayout()), Builder(SE.getContext()) {}
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2016-07-01 07:11:38 +08:00
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bool run();
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private:
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unsigned getPointerAddressSpace(Value *I);
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2016-07-01 10:09:38 +08:00
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unsigned getAlignment(LoadInst *LI) const {
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unsigned Align = LI->getAlignment();
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if (Align != 0)
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return Align;
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return DL.getABITypeAlignment(LI->getType());
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}
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unsigned getAlignment(StoreInst *SI) const {
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unsigned Align = SI->getAlignment();
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if (Align != 0)
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return Align;
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return DL.getABITypeAlignment(SI->getValueOperand()->getType());
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}
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|
2018-07-26 05:33:00 +08:00
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static const unsigned MaxDepth = 3;
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2016-07-01 07:11:38 +08:00
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bool isConsecutiveAccess(Value *A, Value *B);
|
2018-07-26 09:11:36 +08:00
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bool areConsecutivePointers(Value *PtrA, Value *PtrB, const APInt &PtrDelta,
|
2018-07-26 05:33:00 +08:00
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unsigned Depth = 0) const;
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bool lookThroughComplexAddresses(Value *PtrA, Value *PtrB, APInt PtrDelta,
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unsigned Depth) const;
|
2018-07-26 09:11:36 +08:00
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bool lookThroughSelects(Value *PtrA, Value *PtrB, const APInt &PtrDelta,
|
2018-07-26 05:33:00 +08:00
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unsigned Depth) const;
|
2016-07-01 07:11:38 +08:00
|
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|
Correct ordering of loads/stores.
Summary:
Aiming to correct the ordering of loads/stores. This patch changes the
insert point for loads to the position of the first load.
It updates the ordering method for loads to insert before, rather than after.
Before this patch the following sequence:
"load a[1], store a[1], store a[0], load a[2]"
Would incorrectly vectorize to "store a[0,1], load a[1,2]".
The correctness check was assuming the insertion point for loads is at
the position of the first load, when in practice it was at the last
load. An alternative fix would have been to invert the correctness check.
The current fix changes insert position but also requires reordering of
instructions before the vectorized load.
Updated testcases to reflect the changes.
Reviewers: tstellarAMD, llvm-commits, jlebar, arsenm
Subscribers: mzolotukhin
Differential Revision: http://reviews.llvm.org/D22071
llvm-svn: 275117
2016-07-12 06:34:29 +08:00
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/// After vectorization, reorder the instructions that I depends on
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/// (the instructions defining its operands), to ensure they dominate I.
|
2016-07-01 07:11:38 +08:00
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void reorder(Instruction *I);
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/// Returns the first and the last instructions in Chain.
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std::pair<BasicBlock::iterator, BasicBlock::iterator>
|
2016-07-28 07:06:00 +08:00
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getBoundaryInstrs(ArrayRef<Instruction *> Chain);
|
2016-07-01 07:11:38 +08:00
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/// Erases the original instructions after vectorizing.
|
2016-07-28 07:06:00 +08:00
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void eraseInstructions(ArrayRef<Instruction *> Chain);
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2016-07-01 07:11:38 +08:00
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/// "Legalize" the vector type that would be produced by combining \p
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/// ElementSizeBits elements in \p Chain. Break into two pieces such that the
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/// total size of each piece is 1, 2 or a multiple of 4 bytes. \p Chain is
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/// expected to have more than 4 elements.
|
2016-07-28 07:06:00 +08:00
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std::pair<ArrayRef<Instruction *>, ArrayRef<Instruction *>>
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splitOddVectorElts(ArrayRef<Instruction *> Chain, unsigned ElementSizeBits);
|
2016-07-01 07:11:38 +08:00
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2016-07-20 07:19:20 +08:00
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/// Finds the largest prefix of Chain that's vectorizable, checking for
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/// intervening instructions which may affect the memory accessed by the
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/// instructions within Chain.
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///
|
2016-07-20 08:55:12 +08:00
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/// The elements of \p Chain must be all loads or all stores and must be in
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/// address order.
|
2016-07-28 07:06:00 +08:00
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ArrayRef<Instruction *> getVectorizablePrefix(ArrayRef<Instruction *> Chain);
|
2016-07-01 07:11:38 +08:00
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/// Collects load and store instructions to vectorize.
|
2016-07-28 07:06:00 +08:00
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std::pair<InstrListMap, InstrListMap> collectInstructions(BasicBlock *BB);
|
2016-07-01 07:11:38 +08:00
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2016-07-28 07:06:00 +08:00
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/// Processes the collected instructions, the \p Map. The values of \p Map
|
2016-07-01 07:11:38 +08:00
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/// should be all loads or all stores.
|
2016-07-28 07:06:00 +08:00
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bool vectorizeChains(InstrListMap &Map);
|
2016-07-01 07:11:38 +08:00
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/// Finds the load/stores to consecutive memory addresses and vectorizes them.
|
2016-07-28 07:06:00 +08:00
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bool vectorizeInstructions(ArrayRef<Instruction *> Instrs);
|
2016-07-01 07:11:38 +08:00
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/// Vectorizes the load instructions in Chain.
|
2016-07-28 07:06:00 +08:00
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bool
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vectorizeLoadChain(ArrayRef<Instruction *> Chain,
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SmallPtrSet<Instruction *, 16> *InstructionsProcessed);
|
2016-07-01 07:11:38 +08:00
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/// Vectorizes the store instructions in Chain.
|
2016-07-28 07:06:00 +08:00
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bool
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vectorizeStoreChain(ArrayRef<Instruction *> Chain,
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SmallPtrSet<Instruction *, 16> *InstructionsProcessed);
|
2016-07-12 04:46:17 +08:00
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2016-09-29 21:04:37 +08:00
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/// Check if this load/store access is misaligned accesses.
|
2016-07-12 04:46:17 +08:00
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bool accessIsMisaligned(unsigned SzInBytes, unsigned AddressSpace,
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unsigned Alignment);
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2016-07-01 07:11:38 +08:00
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};
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class LoadStoreVectorizer : public FunctionPass {
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public:
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static char ID;
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2016-07-01 10:07:22 +08:00
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LoadStoreVectorizer() : FunctionPass(ID) {
|
2016-07-01 07:11:38 +08:00
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initializeLoadStoreVectorizerPass(*PassRegistry::getPassRegistry());
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}
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bool runOnFunction(Function &F) override;
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2016-10-01 10:56:57 +08:00
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StringRef getPassName() const override {
|
2016-07-01 07:11:38 +08:00
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return "GPU Load and Store Vectorizer";
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.addRequired<AAResultsWrapperPass>();
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AU.addRequired<ScalarEvolutionWrapperPass>();
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AU.addRequired<DominatorTreeWrapperPass>();
|
2016-07-01 10:07:22 +08:00
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AU.addRequired<TargetTransformInfoWrapperPass>();
|
2016-07-01 07:11:38 +08:00
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AU.setPreservesCFG();
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}
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};
|
2017-10-18 05:27:42 +08:00
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} // end anonymous namespace
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char LoadStoreVectorizer::ID = 0;
|
2016-07-01 07:11:38 +08:00
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INITIALIZE_PASS_BEGIN(LoadStoreVectorizer, DEBUG_TYPE,
|
2016-07-02 07:26:54 +08:00
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"Vectorize load and Store instructions", false, false)
|
2016-07-01 07:11:38 +08:00
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INITIALIZE_PASS_DEPENDENCY(SCEVAAWrapperPass)
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INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
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INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
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INITIALIZE_PASS_DEPENDENCY(GlobalsAAWrapperPass)
|
2016-07-01 10:07:22 +08:00
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INITIALIZE_PASS_DEPENDENCY(TargetTransformInfoWrapperPass)
|
2016-07-01 07:11:38 +08:00
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INITIALIZE_PASS_END(LoadStoreVectorizer, DEBUG_TYPE,
|
2016-07-02 07:26:54 +08:00
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"Vectorize load and store instructions", false, false)
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2016-07-01 07:11:38 +08:00
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2016-07-01 10:07:22 +08:00
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Pass *llvm::createLoadStoreVectorizerPass() {
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return new LoadStoreVectorizer();
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2016-07-01 07:11:38 +08:00
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}
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2016-07-28 07:06:00 +08:00
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// The real propagateMetadata expects a SmallVector<Value*>, but we deal in
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// vectors of Instructions.
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static void propagateMetadata(Instruction *I, ArrayRef<Instruction *> IL) {
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SmallVector<Value *, 8> VL(IL.begin(), IL.end());
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propagateMetadata(I, VL);
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}
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2016-07-01 07:11:38 +08:00
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bool LoadStoreVectorizer::runOnFunction(Function &F) {
|
2016-07-01 07:50:18 +08:00
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// Don't vectorize when the attribute NoImplicitFloat is used.
|
|
|
|
if (skipFunction(F) || F.hasFnAttribute(Attribute::NoImplicitFloat))
|
|
|
|
return false;
|
|
|
|
|
2016-07-01 07:11:38 +08:00
|
|
|
AliasAnalysis &AA = getAnalysis<AAResultsWrapperPass>().getAAResults();
|
|
|
|
DominatorTree &DT = getAnalysis<DominatorTreeWrapperPass>().getDomTree();
|
|
|
|
ScalarEvolution &SE = getAnalysis<ScalarEvolutionWrapperPass>().getSE();
|
2016-07-08 04:10:35 +08:00
|
|
|
TargetTransformInfo &TTI =
|
|
|
|
getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
|
2016-07-01 07:11:38 +08:00
|
|
|
|
2016-07-01 10:07:22 +08:00
|
|
|
Vectorizer V(F, AA, DT, SE, TTI);
|
2016-07-01 07:11:38 +08:00
|
|
|
return V.run();
|
|
|
|
}
|
|
|
|
|
|
|
|
// Vectorizer Implementation
|
|
|
|
bool Vectorizer::run() {
|
|
|
|
bool Changed = false;
|
|
|
|
|
|
|
|
// Scan the blocks in the function in post order.
|
|
|
|
for (BasicBlock *BB : post_order(&F)) {
|
2016-07-28 07:06:00 +08:00
|
|
|
InstrListMap LoadRefs, StoreRefs;
|
2016-07-20 07:19:16 +08:00
|
|
|
std::tie(LoadRefs, StoreRefs) = collectInstructions(BB);
|
2016-07-01 07:11:38 +08:00
|
|
|
Changed |= vectorizeChains(LoadRefs);
|
|
|
|
Changed |= vectorizeChains(StoreRefs);
|
|
|
|
}
|
|
|
|
|
|
|
|
return Changed;
|
|
|
|
}
|
|
|
|
|
|
|
|
unsigned Vectorizer::getPointerAddressSpace(Value *I) {
|
|
|
|
if (LoadInst *L = dyn_cast<LoadInst>(I))
|
|
|
|
return L->getPointerAddressSpace();
|
|
|
|
if (StoreInst *S = dyn_cast<StoreInst>(I))
|
|
|
|
return S->getPointerAddressSpace();
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
// FIXME: Merge with llvm::isConsecutiveAccess
|
|
|
|
bool Vectorizer::isConsecutiveAccess(Value *A, Value *B) {
|
2018-03-10 05:05:58 +08:00
|
|
|
Value *PtrA = getLoadStorePointerOperand(A);
|
|
|
|
Value *PtrB = getLoadStorePointerOperand(B);
|
2016-07-01 07:11:38 +08:00
|
|
|
unsigned ASA = getPointerAddressSpace(A);
|
|
|
|
unsigned ASB = getPointerAddressSpace(B);
|
|
|
|
|
|
|
|
// Check that the address spaces match and that the pointers are valid.
|
|
|
|
if (!PtrA || !PtrB || (ASA != ASB))
|
|
|
|
return false;
|
|
|
|
|
|
|
|
// Make sure that A and B are different pointers of the same size type.
|
|
|
|
Type *PtrATy = PtrA->getType()->getPointerElementType();
|
|
|
|
Type *PtrBTy = PtrB->getType()->getPointerElementType();
|
|
|
|
if (PtrA == PtrB ||
|
2018-03-07 18:29:28 +08:00
|
|
|
PtrATy->isVectorTy() != PtrBTy->isVectorTy() ||
|
2016-07-01 07:11:38 +08:00
|
|
|
DL.getTypeStoreSize(PtrATy) != DL.getTypeStoreSize(PtrBTy) ||
|
|
|
|
DL.getTypeStoreSize(PtrATy->getScalarType()) !=
|
2016-07-08 04:10:35 +08:00
|
|
|
DL.getTypeStoreSize(PtrBTy->getScalarType()))
|
2016-07-01 07:11:38 +08:00
|
|
|
return false;
|
|
|
|
|
2018-07-21 04:10:04 +08:00
|
|
|
unsigned PtrBitWidth = DL.getPointerSizeInBits(ASA);
|
2016-07-01 07:11:38 +08:00
|
|
|
APInt Size(PtrBitWidth, DL.getTypeStoreSize(PtrATy));
|
|
|
|
|
2018-07-21 04:10:04 +08:00
|
|
|
return areConsecutivePointers(PtrA, PtrB, Size);
|
|
|
|
}
|
|
|
|
|
2018-07-26 05:33:00 +08:00
|
|
|
bool Vectorizer::areConsecutivePointers(Value *PtrA, Value *PtrB,
|
2018-07-26 09:11:36 +08:00
|
|
|
const APInt &PtrDelta,
|
|
|
|
unsigned Depth) const {
|
2018-07-21 04:10:04 +08:00
|
|
|
unsigned PtrBitWidth = DL.getPointerTypeSizeInBits(PtrA->getType());
|
|
|
|
APInt OffsetA(PtrBitWidth, 0);
|
|
|
|
APInt OffsetB(PtrBitWidth, 0);
|
2016-07-01 07:11:38 +08:00
|
|
|
PtrA = PtrA->stripAndAccumulateInBoundsConstantOffsets(DL, OffsetA);
|
|
|
|
PtrB = PtrB->stripAndAccumulateInBoundsConstantOffsets(DL, OffsetB);
|
|
|
|
|
|
|
|
APInt OffsetDelta = OffsetB - OffsetA;
|
|
|
|
|
|
|
|
// Check if they are based on the same pointer. That makes the offsets
|
|
|
|
// sufficient.
|
|
|
|
if (PtrA == PtrB)
|
2018-07-26 05:33:00 +08:00
|
|
|
return OffsetDelta == PtrDelta;
|
2016-07-01 07:11:38 +08:00
|
|
|
|
|
|
|
// Compute the necessary base pointer delta to have the necessary final delta
|
2018-07-26 05:33:00 +08:00
|
|
|
// equal to the pointer delta requested.
|
|
|
|
APInt BaseDelta = PtrDelta - OffsetDelta;
|
2016-07-01 07:11:38 +08:00
|
|
|
|
|
|
|
// Compute the distance with SCEV between the base pointers.
|
|
|
|
const SCEV *PtrSCEVA = SE.getSCEV(PtrA);
|
|
|
|
const SCEV *PtrSCEVB = SE.getSCEV(PtrB);
|
|
|
|
const SCEV *C = SE.getConstant(BaseDelta);
|
|
|
|
const SCEV *X = SE.getAddExpr(PtrSCEVA, C);
|
|
|
|
if (X == PtrSCEVB)
|
|
|
|
return true;
|
|
|
|
|
2018-07-20 00:50:27 +08:00
|
|
|
// The above check will not catch the cases where one of the pointers is
|
|
|
|
// factorized but the other one is not, such as (C + (S * (A + B))) vs
|
|
|
|
// (AS + BS). Get the minus scev. That will allow re-combining the expresions
|
|
|
|
// and getting the simplified difference.
|
|
|
|
const SCEV *Dist = SE.getMinusSCEV(PtrSCEVB, PtrSCEVA);
|
|
|
|
if (C == Dist)
|
|
|
|
return true;
|
|
|
|
|
2016-07-01 07:11:38 +08:00
|
|
|
// Sometimes even this doesn't work, because SCEV can't always see through
|
|
|
|
// patterns that look like (gep (ext (add (shl X, C1), C2))). Try checking
|
|
|
|
// things the hard way.
|
2018-07-26 05:33:00 +08:00
|
|
|
return lookThroughComplexAddresses(PtrA, PtrB, BaseDelta, Depth);
|
2018-07-21 04:10:04 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
bool Vectorizer::lookThroughComplexAddresses(Value *PtrA, Value *PtrB,
|
2018-07-26 05:33:00 +08:00
|
|
|
APInt PtrDelta,
|
|
|
|
unsigned Depth) const {
|
2018-07-21 04:10:04 +08:00
|
|
|
auto *GEPA = dyn_cast<GetElementPtrInst>(PtrA);
|
|
|
|
auto *GEPB = dyn_cast<GetElementPtrInst>(PtrB);
|
|
|
|
if (!GEPA || !GEPB)
|
2018-07-26 05:33:00 +08:00
|
|
|
return lookThroughSelects(PtrA, PtrB, PtrDelta, Depth);
|
2016-07-01 07:11:38 +08:00
|
|
|
|
|
|
|
// Look through GEPs after checking they're the same except for the last
|
|
|
|
// index.
|
2018-07-21 04:10:04 +08:00
|
|
|
if (GEPA->getNumOperands() != GEPB->getNumOperands() ||
|
|
|
|
GEPA->getPointerOperand() != GEPB->getPointerOperand())
|
2016-07-01 07:11:38 +08:00
|
|
|
return false;
|
2018-07-21 04:10:04 +08:00
|
|
|
gep_type_iterator GTIA = gep_type_begin(GEPA);
|
|
|
|
gep_type_iterator GTIB = gep_type_begin(GEPB);
|
|
|
|
for (unsigned I = 0, E = GEPA->getNumIndices() - 1; I < E; ++I) {
|
|
|
|
if (GTIA.getOperand() != GTIB.getOperand())
|
2016-07-01 07:11:38 +08:00
|
|
|
return false;
|
2018-07-21 04:10:04 +08:00
|
|
|
++GTIA;
|
|
|
|
++GTIB;
|
|
|
|
}
|
2016-07-01 07:11:38 +08:00
|
|
|
|
2018-07-21 04:10:04 +08:00
|
|
|
Instruction *OpA = dyn_cast<Instruction>(GTIA.getOperand());
|
|
|
|
Instruction *OpB = dyn_cast<Instruction>(GTIB.getOperand());
|
2016-07-01 07:11:38 +08:00
|
|
|
if (!OpA || !OpB || OpA->getOpcode() != OpB->getOpcode() ||
|
|
|
|
OpA->getType() != OpB->getType())
|
|
|
|
return false;
|
|
|
|
|
2018-07-21 04:10:04 +08:00
|
|
|
if (PtrDelta.isNegative()) {
|
|
|
|
if (PtrDelta.isMinSignedValue())
|
|
|
|
return false;
|
|
|
|
PtrDelta.negate();
|
|
|
|
std::swap(OpA, OpB);
|
|
|
|
}
|
|
|
|
uint64_t Stride = DL.getTypeAllocSize(GTIA.getIndexedType());
|
|
|
|
if (PtrDelta.urem(Stride) != 0)
|
|
|
|
return false;
|
|
|
|
unsigned IdxBitWidth = OpA->getType()->getScalarSizeInBits();
|
|
|
|
APInt IdxDiff = PtrDelta.udiv(Stride).zextOrSelf(IdxBitWidth);
|
|
|
|
|
2016-07-01 07:11:38 +08:00
|
|
|
// Only look through a ZExt/SExt.
|
|
|
|
if (!isa<SExtInst>(OpA) && !isa<ZExtInst>(OpA))
|
|
|
|
return false;
|
|
|
|
|
2016-07-01 10:16:24 +08:00
|
|
|
bool Signed = isa<SExtInst>(OpA);
|
|
|
|
|
2018-07-21 04:10:04 +08:00
|
|
|
// At this point A could be a function parameter, i.e. not an instruction
|
|
|
|
Value *ValA = OpA->getOperand(0);
|
2016-07-01 07:11:38 +08:00
|
|
|
OpB = dyn_cast<Instruction>(OpB->getOperand(0));
|
2018-07-21 04:10:04 +08:00
|
|
|
if (!OpB || ValA->getType() != OpB->getType())
|
2016-07-01 07:11:38 +08:00
|
|
|
return false;
|
|
|
|
|
2018-07-21 04:10:04 +08:00
|
|
|
// Now we need to prove that adding IdxDiff to ValA won't overflow.
|
2016-07-01 10:16:24 +08:00
|
|
|
bool Safe = false;
|
2018-07-21 04:10:04 +08:00
|
|
|
// First attempt: if OpB is an add with NSW/NUW, and OpB is IdxDiff added to
|
|
|
|
// ValA, we're okay.
|
2016-07-01 10:16:24 +08:00
|
|
|
if (OpB->getOpcode() == Instruction::Add &&
|
|
|
|
isa<ConstantInt>(OpB->getOperand(1)) &&
|
2018-07-21 04:10:04 +08:00
|
|
|
IdxDiff.sle(cast<ConstantInt>(OpB->getOperand(1))->getSExtValue())) {
|
2016-07-01 10:16:24 +08:00
|
|
|
if (Signed)
|
|
|
|
Safe = cast<BinaryOperator>(OpB)->hasNoSignedWrap();
|
|
|
|
else
|
|
|
|
Safe = cast<BinaryOperator>(OpB)->hasNoUnsignedWrap();
|
|
|
|
}
|
|
|
|
|
2018-07-21 04:10:04 +08:00
|
|
|
unsigned BitWidth = ValA->getType()->getScalarSizeInBits();
|
2016-07-01 10:16:24 +08:00
|
|
|
|
|
|
|
// Second attempt:
|
2018-07-21 04:10:04 +08:00
|
|
|
// If all set bits of IdxDiff or any higher order bit other than the sign bit
|
|
|
|
// are known to be zero in ValA, we can add Diff to it while guaranteeing no
|
|
|
|
// overflow of any sort.
|
2016-07-01 10:16:24 +08:00
|
|
|
if (!Safe) {
|
2018-07-21 04:10:04 +08:00
|
|
|
OpA = dyn_cast<Instruction>(ValA);
|
|
|
|
if (!OpA)
|
|
|
|
return false;
|
2017-04-27 00:39:58 +08:00
|
|
|
KnownBits Known(BitWidth);
|
|
|
|
computeKnownBits(OpA, Known, DL, 0, nullptr, OpA, &DT);
|
2018-07-21 04:10:04 +08:00
|
|
|
APInt BitsAllowedToBeSet = Known.Zero.zext(IdxDiff.getBitWidth());
|
|
|
|
if (Signed)
|
|
|
|
BitsAllowedToBeSet.clearBit(BitWidth - 1);
|
|
|
|
if (BitsAllowedToBeSet.ult(IdxDiff))
|
|
|
|
return false;
|
2016-07-01 10:16:24 +08:00
|
|
|
}
|
|
|
|
|
2018-07-21 04:10:04 +08:00
|
|
|
const SCEV *OffsetSCEVA = SE.getSCEV(ValA);
|
2016-07-01 07:11:38 +08:00
|
|
|
const SCEV *OffsetSCEVB = SE.getSCEV(OpB);
|
2018-07-21 04:10:04 +08:00
|
|
|
const SCEV *C = SE.getConstant(IdxDiff.trunc(BitWidth));
|
|
|
|
const SCEV *X = SE.getAddExpr(OffsetSCEVA, C);
|
|
|
|
return X == OffsetSCEVB;
|
2016-07-01 07:11:38 +08:00
|
|
|
}
|
|
|
|
|
2018-07-26 09:11:36 +08:00
|
|
|
bool Vectorizer::lookThroughSelects(Value *PtrA, Value *PtrB,
|
|
|
|
const APInt &PtrDelta,
|
2018-07-26 05:33:00 +08:00
|
|
|
unsigned Depth) const {
|
|
|
|
if (Depth++ == MaxDepth)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
if (auto *SelectA = dyn_cast<SelectInst>(PtrA)) {
|
|
|
|
if (auto *SelectB = dyn_cast<SelectInst>(PtrB)) {
|
|
|
|
return SelectA->getCondition() == SelectB->getCondition() &&
|
|
|
|
areConsecutivePointers(SelectA->getTrueValue(),
|
|
|
|
SelectB->getTrueValue(), PtrDelta, Depth) &&
|
|
|
|
areConsecutivePointers(SelectA->getFalseValue(),
|
|
|
|
SelectB->getFalseValue(), PtrDelta, Depth);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-07-01 07:11:38 +08:00
|
|
|
void Vectorizer::reorder(Instruction *I) {
|
2016-08-13 08:04:08 +08:00
|
|
|
OrderedBasicBlock OBB(I->getParent());
|
Correct ordering of loads/stores.
Summary:
Aiming to correct the ordering of loads/stores. This patch changes the
insert point for loads to the position of the first load.
It updates the ordering method for loads to insert before, rather than after.
Before this patch the following sequence:
"load a[1], store a[1], store a[0], load a[2]"
Would incorrectly vectorize to "store a[0,1], load a[1,2]".
The correctness check was assuming the insertion point for loads is at
the position of the first load, when in practice it was at the last
load. An alternative fix would have been to invert the correctness check.
The current fix changes insert position but also requires reordering of
instructions before the vectorized load.
Updated testcases to reflect the changes.
Reviewers: tstellarAMD, llvm-commits, jlebar, arsenm
Subscribers: mzolotukhin
Differential Revision: http://reviews.llvm.org/D22071
llvm-svn: 275117
2016-07-12 06:34:29 +08:00
|
|
|
SmallPtrSet<Instruction *, 16> InstructionsToMove;
|
|
|
|
SmallVector<Instruction *, 16> Worklist;
|
|
|
|
|
|
|
|
Worklist.push_back(I);
|
|
|
|
while (!Worklist.empty()) {
|
|
|
|
Instruction *IW = Worklist.pop_back_val();
|
|
|
|
int NumOperands = IW->getNumOperands();
|
|
|
|
for (int i = 0; i < NumOperands; i++) {
|
|
|
|
Instruction *IM = dyn_cast<Instruction>(IW->getOperand(i));
|
|
|
|
if (!IM || IM->getOpcode() == Instruction::PHI)
|
|
|
|
continue;
|
2016-07-01 07:11:38 +08:00
|
|
|
|
2016-08-13 08:04:08 +08:00
|
|
|
// If IM is in another BB, no need to move it, because this pass only
|
|
|
|
// vectorizes instructions within one BB.
|
|
|
|
if (IM->getParent() != I->getParent())
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (!OBB.dominates(IM, I)) {
|
Correct ordering of loads/stores.
Summary:
Aiming to correct the ordering of loads/stores. This patch changes the
insert point for loads to the position of the first load.
It updates the ordering method for loads to insert before, rather than after.
Before this patch the following sequence:
"load a[1], store a[1], store a[0], load a[2]"
Would incorrectly vectorize to "store a[0,1], load a[1,2]".
The correctness check was assuming the insertion point for loads is at
the position of the first load, when in practice it was at the last
load. An alternative fix would have been to invert the correctness check.
The current fix changes insert position but also requires reordering of
instructions before the vectorized load.
Updated testcases to reflect the changes.
Reviewers: tstellarAMD, llvm-commits, jlebar, arsenm
Subscribers: mzolotukhin
Differential Revision: http://reviews.llvm.org/D22071
llvm-svn: 275117
2016-07-12 06:34:29 +08:00
|
|
|
InstructionsToMove.insert(IM);
|
|
|
|
Worklist.push_back(IM);
|
|
|
|
}
|
2016-07-01 07:11:38 +08:00
|
|
|
}
|
|
|
|
}
|
Correct ordering of loads/stores.
Summary:
Aiming to correct the ordering of loads/stores. This patch changes the
insert point for loads to the position of the first load.
It updates the ordering method for loads to insert before, rather than after.
Before this patch the following sequence:
"load a[1], store a[1], store a[0], load a[2]"
Would incorrectly vectorize to "store a[0,1], load a[1,2]".
The correctness check was assuming the insertion point for loads is at
the position of the first load, when in practice it was at the last
load. An alternative fix would have been to invert the correctness check.
The current fix changes insert position but also requires reordering of
instructions before the vectorized load.
Updated testcases to reflect the changes.
Reviewers: tstellarAMD, llvm-commits, jlebar, arsenm
Subscribers: mzolotukhin
Differential Revision: http://reviews.llvm.org/D22071
llvm-svn: 275117
2016-07-12 06:34:29 +08:00
|
|
|
|
|
|
|
// All instructions to move should follow I. Start from I, not from begin().
|
|
|
|
for (auto BBI = I->getIterator(), E = I->getParent()->end(); BBI != E;
|
|
|
|
++BBI) {
|
2016-08-02 17:35:17 +08:00
|
|
|
if (!InstructionsToMove.count(&*BBI))
|
Correct ordering of loads/stores.
Summary:
Aiming to correct the ordering of loads/stores. This patch changes the
insert point for loads to the position of the first load.
It updates the ordering method for loads to insert before, rather than after.
Before this patch the following sequence:
"load a[1], store a[1], store a[0], load a[2]"
Would incorrectly vectorize to "store a[0,1], load a[1,2]".
The correctness check was assuming the insertion point for loads is at
the position of the first load, when in practice it was at the last
load. An alternative fix would have been to invert the correctness check.
The current fix changes insert position but also requires reordering of
instructions before the vectorized load.
Updated testcases to reflect the changes.
Reviewers: tstellarAMD, llvm-commits, jlebar, arsenm
Subscribers: mzolotukhin
Differential Revision: http://reviews.llvm.org/D22071
llvm-svn: 275117
2016-07-12 06:34:29 +08:00
|
|
|
continue;
|
|
|
|
Instruction *IM = &*BBI;
|
|
|
|
--BBI;
|
|
|
|
IM->removeFromParent();
|
|
|
|
IM->insertBefore(I);
|
|
|
|
}
|
2016-07-01 07:11:38 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
std::pair<BasicBlock::iterator, BasicBlock::iterator>
|
2016-07-28 07:06:00 +08:00
|
|
|
Vectorizer::getBoundaryInstrs(ArrayRef<Instruction *> Chain) {
|
|
|
|
Instruction *C0 = Chain[0];
|
2016-07-01 07:11:38 +08:00
|
|
|
BasicBlock::iterator FirstInstr = C0->getIterator();
|
|
|
|
BasicBlock::iterator LastInstr = C0->getIterator();
|
|
|
|
|
|
|
|
BasicBlock *BB = C0->getParent();
|
|
|
|
unsigned NumFound = 0;
|
|
|
|
for (Instruction &I : *BB) {
|
|
|
|
if (!is_contained(Chain, &I))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
++NumFound;
|
|
|
|
if (NumFound == 1) {
|
|
|
|
FirstInstr = I.getIterator();
|
2016-07-02 05:44:12 +08:00
|
|
|
}
|
|
|
|
if (NumFound == Chain.size()) {
|
2016-07-01 07:11:38 +08:00
|
|
|
LastInstr = I.getIterator();
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-07-02 05:44:12 +08:00
|
|
|
// Range is [first, last).
|
|
|
|
return std::make_pair(FirstInstr, ++LastInstr);
|
2016-07-01 07:11:38 +08:00
|
|
|
}
|
|
|
|
|
2016-07-28 07:06:00 +08:00
|
|
|
void Vectorizer::eraseInstructions(ArrayRef<Instruction *> Chain) {
|
2016-07-01 07:11:38 +08:00
|
|
|
SmallVector<Instruction *, 16> Instrs;
|
2016-07-28 07:06:00 +08:00
|
|
|
for (Instruction *I : Chain) {
|
2018-03-10 05:05:58 +08:00
|
|
|
Value *PtrOperand = getLoadStorePointerOperand(I);
|
2016-07-01 07:11:38 +08:00
|
|
|
assert(PtrOperand && "Instruction must have a pointer operand.");
|
2016-07-28 07:06:00 +08:00
|
|
|
Instrs.push_back(I);
|
2016-07-01 07:11:38 +08:00
|
|
|
if (GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(PtrOperand))
|
|
|
|
Instrs.push_back(GEP);
|
|
|
|
}
|
|
|
|
|
|
|
|
// Erase instructions.
|
2016-07-28 07:06:00 +08:00
|
|
|
for (Instruction *I : Instrs)
|
|
|
|
if (I->use_empty())
|
|
|
|
I->eraseFromParent();
|
2016-07-01 07:11:38 +08:00
|
|
|
}
|
|
|
|
|
2016-07-28 07:06:00 +08:00
|
|
|
std::pair<ArrayRef<Instruction *>, ArrayRef<Instruction *>>
|
|
|
|
Vectorizer::splitOddVectorElts(ArrayRef<Instruction *> Chain,
|
2016-07-01 07:11:38 +08:00
|
|
|
unsigned ElementSizeBits) {
|
2016-10-03 18:31:34 +08:00
|
|
|
unsigned ElementSizeBytes = ElementSizeBits / 8;
|
|
|
|
unsigned SizeBytes = ElementSizeBytes * Chain.size();
|
|
|
|
unsigned NumLeft = (SizeBytes - (SizeBytes % 4)) / ElementSizeBytes;
|
2017-02-23 11:58:53 +08:00
|
|
|
if (NumLeft == Chain.size()) {
|
|
|
|
if ((NumLeft & 1) == 0)
|
|
|
|
NumLeft /= 2; // Split even in half
|
|
|
|
else
|
|
|
|
--NumLeft; // Split off last element
|
|
|
|
} else if (NumLeft == 0)
|
2016-10-03 18:31:34 +08:00
|
|
|
NumLeft = 1;
|
2016-07-01 07:11:38 +08:00
|
|
|
return std::make_pair(Chain.slice(0, NumLeft), Chain.slice(NumLeft));
|
|
|
|
}
|
|
|
|
|
2016-07-28 07:06:00 +08:00
|
|
|
ArrayRef<Instruction *>
|
|
|
|
Vectorizer::getVectorizablePrefix(ArrayRef<Instruction *> Chain) {
|
2016-07-20 08:55:12 +08:00
|
|
|
// These are in BB order, unlike Chain, which is in address order.
|
2016-08-13 08:04:08 +08:00
|
|
|
SmallVector<Instruction *, 16> MemoryInstrs;
|
|
|
|
SmallVector<Instruction *, 16> ChainInstrs;
|
2016-07-01 07:11:38 +08:00
|
|
|
|
2016-07-21 04:07:37 +08:00
|
|
|
bool IsLoadChain = isa<LoadInst>(Chain[0]);
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG({
|
2016-07-28 07:06:00 +08:00
|
|
|
for (Instruction *I : Chain) {
|
2016-07-21 04:07:37 +08:00
|
|
|
if (IsLoadChain)
|
2016-07-28 07:06:00 +08:00
|
|
|
assert(isa<LoadInst>(I) &&
|
2016-07-21 04:07:37 +08:00
|
|
|
"All elements of Chain must be loads, or all must be stores.");
|
|
|
|
else
|
2016-07-28 07:06:00 +08:00
|
|
|
assert(isa<StoreInst>(I) &&
|
2016-07-21 04:07:37 +08:00
|
|
|
"All elements of Chain must be loads, or all must be stores.");
|
|
|
|
}
|
|
|
|
});
|
|
|
|
|
2016-07-20 07:19:20 +08:00
|
|
|
for (Instruction &I : make_range(getBoundaryInstrs(Chain))) {
|
2016-07-01 07:11:38 +08:00
|
|
|
if (isa<LoadInst>(I) || isa<StoreInst>(I)) {
|
2016-07-20 07:19:18 +08:00
|
|
|
if (!is_contained(Chain, &I))
|
2016-08-13 08:04:08 +08:00
|
|
|
MemoryInstrs.push_back(&I);
|
2016-07-01 07:11:38 +08:00
|
|
|
else
|
2016-08-13 08:04:08 +08:00
|
|
|
ChainInstrs.push_back(&I);
|
Add an @llvm.sideeffect intrinsic
This patch implements Chandler's idea [0] for supporting languages that
require support for infinite loops with side effects, such as Rust, providing
part of a solution to bug 965 [1].
Specifically, it adds an `llvm.sideeffect()` intrinsic, which has no actual
effect, but which appears to optimization passes to have obscure side effects,
such that they don't optimize away loops containing it. It also teaches
several optimization passes to ignore this intrinsic, so that it doesn't
significantly impact optimization in most cases.
As discussed on llvm-dev [2], this patch is the first of two major parts.
The second part, to change LLVM's semantics to have defined behavior
on infinite loops by default, with a function attribute for opting into
potential-undefined-behavior, will be implemented and posted for review in
a separate patch.
[0] http://lists.llvm.org/pipermail/llvm-dev/2015-July/088103.html
[1] https://bugs.llvm.org/show_bug.cgi?id=965
[2] http://lists.llvm.org/pipermail/llvm-dev/2017-October/118632.html
Differential Revision: https://reviews.llvm.org/D38336
llvm-svn: 317729
2017-11-09 05:59:51 +08:00
|
|
|
} else if (isa<IntrinsicInst>(&I) &&
|
|
|
|
cast<IntrinsicInst>(&I)->getIntrinsicID() ==
|
|
|
|
Intrinsic::sideeffect) {
|
|
|
|
// Ignore llvm.sideeffect calls.
|
2016-07-21 04:07:37 +08:00
|
|
|
} else if (IsLoadChain && (I.mayWriteToMemory() || I.mayThrow())) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LSV: Found may-write/throw operation: " << I
|
|
|
|
<< '\n');
|
2016-07-21 04:07:37 +08:00
|
|
|
break;
|
|
|
|
} else if (!IsLoadChain && (I.mayReadOrWriteMemory() || I.mayThrow())) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LSV: Found may-read/write/throw operation: " << I
|
|
|
|
<< '\n');
|
2016-07-21 04:07:34 +08:00
|
|
|
break;
|
2016-07-01 07:11:38 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-08-13 08:04:08 +08:00
|
|
|
OrderedBasicBlock OBB(Chain[0]->getParent());
|
|
|
|
|
2016-07-20 08:55:12 +08:00
|
|
|
// Loop until we find an instruction in ChainInstrs that we can't vectorize.
|
2016-08-13 08:04:08 +08:00
|
|
|
unsigned ChainInstrIdx = 0;
|
2016-11-24 01:43:15 +08:00
|
|
|
Instruction *BarrierMemoryInstr = nullptr;
|
|
|
|
|
2016-08-13 08:04:08 +08:00
|
|
|
for (unsigned E = ChainInstrs.size(); ChainInstrIdx < E; ++ChainInstrIdx) {
|
|
|
|
Instruction *ChainInstr = ChainInstrs[ChainInstrIdx];
|
2016-11-24 01:43:15 +08:00
|
|
|
|
|
|
|
// If a barrier memory instruction was found, chain instructions that follow
|
|
|
|
// will not be added to the valid prefix.
|
|
|
|
if (BarrierMemoryInstr && OBB.dominates(BarrierMemoryInstr, ChainInstr))
|
|
|
|
break;
|
|
|
|
|
|
|
|
// Check (in BB order) if any instruction prevents ChainInstr from being
|
|
|
|
// vectorized. Find and store the first such "conflicting" instruction.
|
2016-08-13 08:04:08 +08:00
|
|
|
for (Instruction *MemInstr : MemoryInstrs) {
|
2016-11-24 01:43:15 +08:00
|
|
|
// If a barrier memory instruction was found, do not check past it.
|
|
|
|
if (BarrierMemoryInstr && OBB.dominates(BarrierMemoryInstr, MemInstr))
|
|
|
|
break;
|
|
|
|
|
2018-04-24 23:28:47 +08:00
|
|
|
auto *MemLoad = dyn_cast<LoadInst>(MemInstr);
|
|
|
|
auto *ChainLoad = dyn_cast<LoadInst>(ChainInstr);
|
|
|
|
if (MemLoad && ChainLoad)
|
2016-07-01 07:11:38 +08:00
|
|
|
continue;
|
|
|
|
|
2018-04-24 23:28:47 +08:00
|
|
|
// We can ignore the alias if the we have a load store pair and the load
|
|
|
|
// is known to be invariant. The load cannot be clobbered by the store.
|
|
|
|
auto IsInvariantLoad = [](const LoadInst *LI) -> bool {
|
|
|
|
return LI->getMetadata(LLVMContext::MD_invariant_load);
|
|
|
|
};
|
|
|
|
|
2016-07-01 07:11:38 +08:00
|
|
|
// We can ignore the alias as long as the load comes before the store,
|
|
|
|
// because that means we won't be moving the load past the store to
|
|
|
|
// vectorize it (the vectorized load is inserted at the location of the
|
|
|
|
// first load in the chain).
|
2018-04-24 23:28:47 +08:00
|
|
|
if (isa<StoreInst>(MemInstr) && ChainLoad &&
|
|
|
|
(IsInvariantLoad(ChainLoad) || OBB.dominates(ChainLoad, MemInstr)))
|
2016-07-01 07:11:38 +08:00
|
|
|
continue;
|
|
|
|
|
|
|
|
// Same case, but in reverse.
|
2018-04-24 23:28:47 +08:00
|
|
|
if (MemLoad && isa<StoreInst>(ChainInstr) &&
|
|
|
|
(IsInvariantLoad(MemLoad) || OBB.dominates(MemLoad, ChainInstr)))
|
2016-07-01 07:11:38 +08:00
|
|
|
continue;
|
|
|
|
|
2016-07-28 07:06:00 +08:00
|
|
|
if (!AA.isNoAlias(MemoryLocation::get(MemInstr),
|
|
|
|
MemoryLocation::get(ChainInstr))) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG({
|
2016-07-20 07:19:18 +08:00
|
|
|
dbgs() << "LSV: Found alias:\n"
|
|
|
|
" Aliasing instruction and pointer:\n"
|
2016-07-20 08:55:12 +08:00
|
|
|
<< " " << *MemInstr << '\n'
|
2018-03-10 05:05:58 +08:00
|
|
|
<< " " << *getLoadStorePointerOperand(MemInstr) << '\n'
|
2016-07-20 07:19:18 +08:00
|
|
|
<< " Aliased instruction and pointer:\n"
|
2016-07-20 08:55:12 +08:00
|
|
|
<< " " << *ChainInstr << '\n'
|
2018-03-10 05:05:58 +08:00
|
|
|
<< " " << *getLoadStorePointerOperand(ChainInstr) << '\n';
|
2016-07-08 04:10:35 +08:00
|
|
|
});
|
2016-11-24 01:43:15 +08:00
|
|
|
// Save this aliasing memory instruction as a barrier, but allow other
|
|
|
|
// instructions that precede the barrier to be vectorized with this one.
|
|
|
|
BarrierMemoryInstr = MemInstr;
|
2016-07-20 08:55:12 +08:00
|
|
|
break;
|
2016-07-01 07:11:38 +08:00
|
|
|
}
|
|
|
|
}
|
2016-11-24 01:43:15 +08:00
|
|
|
// Continue the search only for store chains, since vectorizing stores that
|
|
|
|
// precede an aliasing load is valid. Conversely, vectorizing loads is valid
|
|
|
|
// up to an aliasing store, but should not pull loads from further down in
|
|
|
|
// the basic block.
|
|
|
|
if (IsLoadChain && BarrierMemoryInstr) {
|
|
|
|
// The BarrierMemoryInstr is a store that precedes ChainInstr.
|
|
|
|
assert(OBB.dominates(BarrierMemoryInstr, ChainInstr));
|
2016-07-20 08:55:12 +08:00
|
|
|
break;
|
2016-11-24 01:43:15 +08:00
|
|
|
}
|
2016-07-20 08:55:12 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
// Find the largest prefix of Chain whose elements are all in
|
|
|
|
// ChainInstrs[0, ChainInstrIdx). This is the largest vectorizable prefix of
|
|
|
|
// Chain. (Recall that Chain is in address order, but ChainInstrs is in BB
|
|
|
|
// order.)
|
2016-08-13 08:04:12 +08:00
|
|
|
SmallPtrSet<Instruction *, 8> VectorizableChainInstrs(
|
|
|
|
ChainInstrs.begin(), ChainInstrs.begin() + ChainInstrIdx);
|
|
|
|
unsigned ChainIdx = 0;
|
|
|
|
for (unsigned ChainLen = Chain.size(); ChainIdx < ChainLen; ++ChainIdx) {
|
|
|
|
if (!VectorizableChainInstrs.count(Chain[ChainIdx]))
|
2016-07-20 08:55:12 +08:00
|
|
|
break;
|
2016-07-01 07:11:38 +08:00
|
|
|
}
|
2016-07-20 08:55:12 +08:00
|
|
|
return Chain.slice(0, ChainIdx);
|
2016-07-01 07:11:38 +08:00
|
|
|
}
|
|
|
|
|
2018-07-26 05:33:00 +08:00
|
|
|
static ChainID getChainID(const Value *Ptr, const DataLayout &DL) {
|
|
|
|
const Value *ObjPtr = GetUnderlyingObject(Ptr, DL);
|
|
|
|
if (const auto *Sel = dyn_cast<SelectInst>(ObjPtr)) {
|
|
|
|
// The select's themselves are distinct instructions even if they share the
|
|
|
|
// same condition and evaluate to consecutive pointers for true and false
|
|
|
|
// values of the condition. Therefore using the select's themselves for
|
|
|
|
// grouping instructions would put consecutive accesses into different lists
|
|
|
|
// and they won't be even checked for being consecutive, and won't be
|
|
|
|
// vectorized.
|
|
|
|
return Sel->getCondition();
|
|
|
|
}
|
|
|
|
return ObjPtr;
|
|
|
|
}
|
|
|
|
|
2016-07-28 07:06:00 +08:00
|
|
|
std::pair<InstrListMap, InstrListMap>
|
2016-07-20 07:19:16 +08:00
|
|
|
Vectorizer::collectInstructions(BasicBlock *BB) {
|
2016-07-28 07:06:00 +08:00
|
|
|
InstrListMap LoadRefs;
|
|
|
|
InstrListMap StoreRefs;
|
2016-07-01 07:11:38 +08:00
|
|
|
|
|
|
|
for (Instruction &I : *BB) {
|
|
|
|
if (!I.mayReadOrWriteMemory())
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (LoadInst *LI = dyn_cast<LoadInst>(&I)) {
|
|
|
|
if (!LI->isSimple())
|
|
|
|
continue;
|
|
|
|
|
2016-10-03 18:31:34 +08:00
|
|
|
// Skip if it's not legal.
|
|
|
|
if (!TTI.isLegalToVectorizeLoad(LI))
|
|
|
|
continue;
|
|
|
|
|
2016-07-01 07:11:38 +08:00
|
|
|
Type *Ty = LI->getType();
|
|
|
|
if (!VectorType::isValidElementType(Ty->getScalarType()))
|
|
|
|
continue;
|
|
|
|
|
2016-07-01 08:36:54 +08:00
|
|
|
// Skip weird non-byte sizes. They probably aren't worth the effort of
|
|
|
|
// handling correctly.
|
|
|
|
unsigned TySize = DL.getTypeSizeInBits(Ty);
|
[LSV] Skip all non-byte sizes, not only less than eight bits
Summary:
The code comments indicate that no effort has been spent on
handling load/stores when the size isn't a multiple of the
byte size correctly. However, the code only avoided types
smaller than 8 bits. So for example a load of an i28 could
still be considered as a candidate for vectorization.
This patch adjusts the code to behave according to the code
comment.
The test case used to hit the following assert when
trying to use "cast" an i32 to i28 using CreateBitOrPointerCast:
opt: ../lib/IR/Instructions.cpp:2565: Assertion `castIsValid(op, S, Ty) && "Invalid cast!"' failed.
#0 PrintStackTraceSignalHandler(void*)
#1 SignalHandler(int)
#2 __restore_rt
#3 __GI_raise
#4 __GI_abort
#5 __GI___assert_fail
#6 llvm::CastInst::Create(llvm::Instruction::CastOps, llvm::Value*, llvm::Type*, llvm::Twine const&, llvm::Instruction*)
#7 llvm::IRBuilder<llvm::ConstantFolder, llvm::IRBuilderDefaultInserter>::CreateBitOrPointerCast(llvm::Value*, llvm::Type*, llvm::Twine const&)
#8 (anonymous namespace)::Vectorizer::vectorizeLoadChain(llvm::ArrayRef<llvm::Instruction*>, llvm::SmallPtrSet<llvm::Instruction*, 16u>*)
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39295
llvm-svn: 316663
2017-10-26 21:42:55 +08:00
|
|
|
if ((TySize % 8) != 0)
|
2016-07-01 08:36:54 +08:00
|
|
|
continue;
|
|
|
|
|
[LSV] Avoid adding vectors of pointers as candidates
Summary:
We no longer add vectors of pointers as candidates for
load/store vectorization. It does not seem to work anyway,
but without this patch we can end up in asserts when trying
to create casts between an integer type and the pointer of
vectors type.
The test case I've added used to assert like this when trying to
cast between i64 and <2 x i16*>:
opt: ../lib/IR/Instructions.cpp:2565: Assertion `castIsValid(op, S, Ty) && "Invalid cast!"' failed.
#0 PrintStackTraceSignalHandler(void*)
#1 SignalHandler(int)
#2 __restore_rt
#3 __GI_raise
#4 __GI_abort
#5 __GI___assert_fail
#6 llvm::CastInst::Create(llvm::Instruction::CastOps, llvm::Value*, llvm::Type*, llvm::Twine const&, llvm::Instruction*)
#7 llvm::IRBuilder<llvm::ConstantFolder, llvm::IRBuilderDefaultInserter>::CreateBitOrPointerCast(llvm::Value*, llvm::Type*, llvm::Twine const&)
#8 Vectorizer::vectorizeStoreChain(llvm::ArrayRef<llvm::Instruction*>, llvm::SmallPtrSet<llvm::Instruction*, 16u>*)
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: nhaehnle, llvm-commits
Differential Revision: https://reviews.llvm.org/D39296
llvm-svn: 316665
2017-10-26 21:59:15 +08:00
|
|
|
// Skip vectors of pointers. The vectorizeLoadChain/vectorizeStoreChain
|
|
|
|
// functions are currently using an integer type for the vectorized
|
|
|
|
// load/store, and does not support casting between the integer type and a
|
|
|
|
// vector of pointers (e.g. i64 to <2 x i16*>)
|
|
|
|
if (Ty->isVectorTy() && Ty->isPtrOrPtrVectorTy())
|
|
|
|
continue;
|
|
|
|
|
2016-07-01 10:07:22 +08:00
|
|
|
Value *Ptr = LI->getPointerOperand();
|
|
|
|
unsigned AS = Ptr->getType()->getPointerAddressSpace();
|
|
|
|
unsigned VecRegSize = TTI.getLoadStoreVecRegBitWidth(AS);
|
|
|
|
|
2018-03-08 01:09:18 +08:00
|
|
|
unsigned VF = VecRegSize / TySize;
|
|
|
|
VectorType *VecTy = dyn_cast<VectorType>(Ty);
|
|
|
|
|
2016-07-01 07:11:38 +08:00
|
|
|
// No point in looking at these if they're too big to vectorize.
|
2018-03-08 01:09:18 +08:00
|
|
|
if (TySize > VecRegSize / 2 ||
|
|
|
|
(VecTy && TTI.getLoadVectorFactor(VF, TySize, TySize / 8, VecTy) == 0))
|
2016-07-01 07:11:38 +08:00
|
|
|
continue;
|
|
|
|
|
|
|
|
// Make sure all the users of a vector are constant-index extracts.
|
2017-10-18 05:27:42 +08:00
|
|
|
if (isa<VectorType>(Ty) && !llvm::all_of(LI->users(), [](const User *U) {
|
2016-07-28 07:06:00 +08:00
|
|
|
const ExtractElementInst *EEI = dyn_cast<ExtractElementInst>(U);
|
|
|
|
return EEI && isa<ConstantInt>(EEI->getOperand(1));
|
2016-07-01 07:11:38 +08:00
|
|
|
}))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
// Save the load locations.
|
2018-07-26 05:33:00 +08:00
|
|
|
const ChainID ID = getChainID(Ptr, DL);
|
|
|
|
LoadRefs[ID].push_back(LI);
|
2016-07-01 07:11:38 +08:00
|
|
|
} else if (StoreInst *SI = dyn_cast<StoreInst>(&I)) {
|
|
|
|
if (!SI->isSimple())
|
|
|
|
continue;
|
|
|
|
|
2016-10-03 18:31:34 +08:00
|
|
|
// Skip if it's not legal.
|
|
|
|
if (!TTI.isLegalToVectorizeStore(SI))
|
|
|
|
continue;
|
|
|
|
|
2016-07-01 07:11:38 +08:00
|
|
|
Type *Ty = SI->getValueOperand()->getType();
|
|
|
|
if (!VectorType::isValidElementType(Ty->getScalarType()))
|
|
|
|
continue;
|
|
|
|
|
[LSV] Avoid adding vectors of pointers as candidates
Summary:
We no longer add vectors of pointers as candidates for
load/store vectorization. It does not seem to work anyway,
but without this patch we can end up in asserts when trying
to create casts between an integer type and the pointer of
vectors type.
The test case I've added used to assert like this when trying to
cast between i64 and <2 x i16*>:
opt: ../lib/IR/Instructions.cpp:2565: Assertion `castIsValid(op, S, Ty) && "Invalid cast!"' failed.
#0 PrintStackTraceSignalHandler(void*)
#1 SignalHandler(int)
#2 __restore_rt
#3 __GI_raise
#4 __GI_abort
#5 __GI___assert_fail
#6 llvm::CastInst::Create(llvm::Instruction::CastOps, llvm::Value*, llvm::Type*, llvm::Twine const&, llvm::Instruction*)
#7 llvm::IRBuilder<llvm::ConstantFolder, llvm::IRBuilderDefaultInserter>::CreateBitOrPointerCast(llvm::Value*, llvm::Type*, llvm::Twine const&)
#8 Vectorizer::vectorizeStoreChain(llvm::ArrayRef<llvm::Instruction*>, llvm::SmallPtrSet<llvm::Instruction*, 16u>*)
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: nhaehnle, llvm-commits
Differential Revision: https://reviews.llvm.org/D39296
llvm-svn: 316665
2017-10-26 21:59:15 +08:00
|
|
|
// Skip vectors of pointers. The vectorizeLoadChain/vectorizeStoreChain
|
|
|
|
// functions are currently using an integer type for the vectorized
|
|
|
|
// load/store, and does not support casting between the integer type and a
|
|
|
|
// vector of pointers (e.g. i64 to <2 x i16*>)
|
|
|
|
if (Ty->isVectorTy() && Ty->isPtrOrPtrVectorTy())
|
|
|
|
continue;
|
|
|
|
|
2016-07-01 08:36:54 +08:00
|
|
|
// Skip weird non-byte sizes. They probably aren't worth the effort of
|
|
|
|
// handling correctly.
|
|
|
|
unsigned TySize = DL.getTypeSizeInBits(Ty);
|
[LSV] Skip all non-byte sizes, not only less than eight bits
Summary:
The code comments indicate that no effort has been spent on
handling load/stores when the size isn't a multiple of the
byte size correctly. However, the code only avoided types
smaller than 8 bits. So for example a load of an i28 could
still be considered as a candidate for vectorization.
This patch adjusts the code to behave according to the code
comment.
The test case used to hit the following assert when
trying to use "cast" an i32 to i28 using CreateBitOrPointerCast:
opt: ../lib/IR/Instructions.cpp:2565: Assertion `castIsValid(op, S, Ty) && "Invalid cast!"' failed.
#0 PrintStackTraceSignalHandler(void*)
#1 SignalHandler(int)
#2 __restore_rt
#3 __GI_raise
#4 __GI_abort
#5 __GI___assert_fail
#6 llvm::CastInst::Create(llvm::Instruction::CastOps, llvm::Value*, llvm::Type*, llvm::Twine const&, llvm::Instruction*)
#7 llvm::IRBuilder<llvm::ConstantFolder, llvm::IRBuilderDefaultInserter>::CreateBitOrPointerCast(llvm::Value*, llvm::Type*, llvm::Twine const&)
#8 (anonymous namespace)::Vectorizer::vectorizeLoadChain(llvm::ArrayRef<llvm::Instruction*>, llvm::SmallPtrSet<llvm::Instruction*, 16u>*)
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39295
llvm-svn: 316663
2017-10-26 21:42:55 +08:00
|
|
|
if ((TySize % 8) != 0)
|
2016-07-01 08:36:54 +08:00
|
|
|
continue;
|
|
|
|
|
2016-07-01 10:07:22 +08:00
|
|
|
Value *Ptr = SI->getPointerOperand();
|
|
|
|
unsigned AS = Ptr->getType()->getPointerAddressSpace();
|
|
|
|
unsigned VecRegSize = TTI.getLoadStoreVecRegBitWidth(AS);
|
[LSV] Skip all non-byte sizes, not only less than eight bits
Summary:
The code comments indicate that no effort has been spent on
handling load/stores when the size isn't a multiple of the
byte size correctly. However, the code only avoided types
smaller than 8 bits. So for example a load of an i28 could
still be considered as a candidate for vectorization.
This patch adjusts the code to behave according to the code
comment.
The test case used to hit the following assert when
trying to use "cast" an i32 to i28 using CreateBitOrPointerCast:
opt: ../lib/IR/Instructions.cpp:2565: Assertion `castIsValid(op, S, Ty) && "Invalid cast!"' failed.
#0 PrintStackTraceSignalHandler(void*)
#1 SignalHandler(int)
#2 __restore_rt
#3 __GI_raise
#4 __GI_abort
#5 __GI___assert_fail
#6 llvm::CastInst::Create(llvm::Instruction::CastOps, llvm::Value*, llvm::Type*, llvm::Twine const&, llvm::Instruction*)
#7 llvm::IRBuilder<llvm::ConstantFolder, llvm::IRBuilderDefaultInserter>::CreateBitOrPointerCast(llvm::Value*, llvm::Type*, llvm::Twine const&)
#8 (anonymous namespace)::Vectorizer::vectorizeLoadChain(llvm::ArrayRef<llvm::Instruction*>, llvm::SmallPtrSet<llvm::Instruction*, 16u>*)
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39295
llvm-svn: 316663
2017-10-26 21:42:55 +08:00
|
|
|
|
2018-03-08 01:09:18 +08:00
|
|
|
unsigned VF = VecRegSize / TySize;
|
|
|
|
VectorType *VecTy = dyn_cast<VectorType>(Ty);
|
|
|
|
|
[LSV] Skip all non-byte sizes, not only less than eight bits
Summary:
The code comments indicate that no effort has been spent on
handling load/stores when the size isn't a multiple of the
byte size correctly. However, the code only avoided types
smaller than 8 bits. So for example a load of an i28 could
still be considered as a candidate for vectorization.
This patch adjusts the code to behave according to the code
comment.
The test case used to hit the following assert when
trying to use "cast" an i32 to i28 using CreateBitOrPointerCast:
opt: ../lib/IR/Instructions.cpp:2565: Assertion `castIsValid(op, S, Ty) && "Invalid cast!"' failed.
#0 PrintStackTraceSignalHandler(void*)
#1 SignalHandler(int)
#2 __restore_rt
#3 __GI_raise
#4 __GI_abort
#5 __GI___assert_fail
#6 llvm::CastInst::Create(llvm::Instruction::CastOps, llvm::Value*, llvm::Type*, llvm::Twine const&, llvm::Instruction*)
#7 llvm::IRBuilder<llvm::ConstantFolder, llvm::IRBuilderDefaultInserter>::CreateBitOrPointerCast(llvm::Value*, llvm::Type*, llvm::Twine const&)
#8 (anonymous namespace)::Vectorizer::vectorizeLoadChain(llvm::ArrayRef<llvm::Instruction*>, llvm::SmallPtrSet<llvm::Instruction*, 16u>*)
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39295
llvm-svn: 316663
2017-10-26 21:42:55 +08:00
|
|
|
// No point in looking at these if they're too big to vectorize.
|
2018-03-08 01:09:18 +08:00
|
|
|
if (TySize > VecRegSize / 2 ||
|
|
|
|
(VecTy && TTI.getStoreVectorFactor(VF, TySize, TySize / 8, VecTy) == 0))
|
2016-07-01 07:11:38 +08:00
|
|
|
continue;
|
|
|
|
|
2017-10-18 05:27:42 +08:00
|
|
|
if (isa<VectorType>(Ty) && !llvm::all_of(SI->users(), [](const User *U) {
|
2016-07-28 07:06:00 +08:00
|
|
|
const ExtractElementInst *EEI = dyn_cast<ExtractElementInst>(U);
|
|
|
|
return EEI && isa<ConstantInt>(EEI->getOperand(1));
|
2016-07-01 07:11:38 +08:00
|
|
|
}))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
// Save store location.
|
2018-07-26 05:33:00 +08:00
|
|
|
const ChainID ID = getChainID(Ptr, DL);
|
|
|
|
StoreRefs[ID].push_back(SI);
|
2016-07-01 07:11:38 +08:00
|
|
|
}
|
|
|
|
}
|
2016-07-20 07:19:16 +08:00
|
|
|
|
|
|
|
return {LoadRefs, StoreRefs};
|
2016-07-01 07:11:38 +08:00
|
|
|
}
|
|
|
|
|
2016-07-28 07:06:00 +08:00
|
|
|
bool Vectorizer::vectorizeChains(InstrListMap &Map) {
|
2016-07-01 07:11:38 +08:00
|
|
|
bool Changed = false;
|
|
|
|
|
2018-07-26 05:33:00 +08:00
|
|
|
for (const std::pair<ChainID, InstrList> &Chain : Map) {
|
2016-07-01 07:11:38 +08:00
|
|
|
unsigned Size = Chain.second.size();
|
|
|
|
if (Size < 2)
|
|
|
|
continue;
|
|
|
|
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LSV: Analyzing a chain of length " << Size << ".\n");
|
2016-07-01 07:11:38 +08:00
|
|
|
|
|
|
|
// Process the stores in chunks of 64.
|
|
|
|
for (unsigned CI = 0, CE = Size; CI < CE; CI += 64) {
|
|
|
|
unsigned Len = std::min<unsigned>(CE - CI, 64);
|
2016-07-28 07:06:00 +08:00
|
|
|
ArrayRef<Instruction *> Chunk(&Chain.second[CI], Len);
|
2016-07-01 07:11:38 +08:00
|
|
|
Changed |= vectorizeInstructions(Chunk);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return Changed;
|
|
|
|
}
|
|
|
|
|
2016-07-28 07:06:00 +08:00
|
|
|
bool Vectorizer::vectorizeInstructions(ArrayRef<Instruction *> Instrs) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LSV: Vectorizing " << Instrs.size()
|
|
|
|
<< " instructions.\n");
|
2016-08-31 07:53:59 +08:00
|
|
|
SmallVector<int, 16> Heads, Tails;
|
2016-07-01 07:11:38 +08:00
|
|
|
int ConsecutiveChain[64];
|
|
|
|
|
[LSV] Avoid adding vectors of pointers as candidates
Summary:
We no longer add vectors of pointers as candidates for
load/store vectorization. It does not seem to work anyway,
but without this patch we can end up in asserts when trying
to create casts between an integer type and the pointer of
vectors type.
The test case I've added used to assert like this when trying to
cast between i64 and <2 x i16*>:
opt: ../lib/IR/Instructions.cpp:2565: Assertion `castIsValid(op, S, Ty) && "Invalid cast!"' failed.
#0 PrintStackTraceSignalHandler(void*)
#1 SignalHandler(int)
#2 __restore_rt
#3 __GI_raise
#4 __GI_abort
#5 __GI___assert_fail
#6 llvm::CastInst::Create(llvm::Instruction::CastOps, llvm::Value*, llvm::Type*, llvm::Twine const&, llvm::Instruction*)
#7 llvm::IRBuilder<llvm::ConstantFolder, llvm::IRBuilderDefaultInserter>::CreateBitOrPointerCast(llvm::Value*, llvm::Type*, llvm::Twine const&)
#8 Vectorizer::vectorizeStoreChain(llvm::ArrayRef<llvm::Instruction*>, llvm::SmallPtrSet<llvm::Instruction*, 16u>*)
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: nhaehnle, llvm-commits
Differential Revision: https://reviews.llvm.org/D39296
llvm-svn: 316665
2017-10-26 21:59:15 +08:00
|
|
|
// Do a quadratic search on all of the given loads/stores and find all of the
|
|
|
|
// pairs of loads/stores that follow each other.
|
2016-07-01 07:11:38 +08:00
|
|
|
for (int i = 0, e = Instrs.size(); i < e; ++i) {
|
|
|
|
ConsecutiveChain[i] = -1;
|
|
|
|
for (int j = e - 1; j >= 0; --j) {
|
|
|
|
if (i == j)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (isConsecutiveAccess(Instrs[i], Instrs[j])) {
|
|
|
|
if (ConsecutiveChain[i] != -1) {
|
|
|
|
int CurDistance = std::abs(ConsecutiveChain[i] - i);
|
|
|
|
int NewDistance = std::abs(ConsecutiveChain[i] - j);
|
|
|
|
if (j < i || NewDistance > CurDistance)
|
|
|
|
continue; // Should not insert.
|
|
|
|
}
|
|
|
|
|
2016-08-31 07:53:59 +08:00
|
|
|
Tails.push_back(j);
|
|
|
|
Heads.push_back(i);
|
2016-07-01 07:11:38 +08:00
|
|
|
ConsecutiveChain[i] = j;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
bool Changed = false;
|
2016-07-28 07:06:00 +08:00
|
|
|
SmallPtrSet<Instruction *, 16> InstructionsProcessed;
|
2016-07-01 07:11:38 +08:00
|
|
|
|
|
|
|
for (int Head : Heads) {
|
2016-07-14 05:20:01 +08:00
|
|
|
if (InstructionsProcessed.count(Instrs[Head]))
|
|
|
|
continue;
|
2016-08-31 07:53:59 +08:00
|
|
|
bool LongerChainExists = false;
|
2016-07-14 05:20:01 +08:00
|
|
|
for (unsigned TIt = 0; TIt < Tails.size(); TIt++)
|
|
|
|
if (Head == Tails[TIt] &&
|
|
|
|
!InstructionsProcessed.count(Instrs[Heads[TIt]])) {
|
2016-08-31 07:53:59 +08:00
|
|
|
LongerChainExists = true;
|
2016-07-14 05:20:01 +08:00
|
|
|
break;
|
|
|
|
}
|
2016-08-31 07:53:59 +08:00
|
|
|
if (LongerChainExists)
|
2016-07-01 07:11:38 +08:00
|
|
|
continue;
|
|
|
|
|
|
|
|
// We found an instr that starts a chain. Now follow the chain and try to
|
|
|
|
// vectorize it.
|
2016-07-28 07:06:00 +08:00
|
|
|
SmallVector<Instruction *, 16> Operands;
|
2016-07-01 07:11:38 +08:00
|
|
|
int I = Head;
|
2016-08-31 07:53:59 +08:00
|
|
|
while (I != -1 && (is_contained(Tails, I) || is_contained(Heads, I))) {
|
2016-07-14 05:20:01 +08:00
|
|
|
if (InstructionsProcessed.count(Instrs[I]))
|
2016-07-01 07:11:38 +08:00
|
|
|
break;
|
|
|
|
|
|
|
|
Operands.push_back(Instrs[I]);
|
|
|
|
I = ConsecutiveChain[I];
|
|
|
|
}
|
|
|
|
|
|
|
|
bool Vectorized = false;
|
|
|
|
if (isa<LoadInst>(*Operands.begin()))
|
2016-07-14 05:20:01 +08:00
|
|
|
Vectorized = vectorizeLoadChain(Operands, &InstructionsProcessed);
|
2016-07-01 07:11:38 +08:00
|
|
|
else
|
2016-07-14 05:20:01 +08:00
|
|
|
Vectorized = vectorizeStoreChain(Operands, &InstructionsProcessed);
|
2016-07-01 07:11:38 +08:00
|
|
|
|
|
|
|
Changed |= Vectorized;
|
|
|
|
}
|
|
|
|
|
|
|
|
return Changed;
|
|
|
|
}
|
|
|
|
|
2016-07-14 05:20:01 +08:00
|
|
|
bool Vectorizer::vectorizeStoreChain(
|
2016-07-28 07:06:00 +08:00
|
|
|
ArrayRef<Instruction *> Chain,
|
|
|
|
SmallPtrSet<Instruction *, 16> *InstructionsProcessed) {
|
2016-07-01 07:11:38 +08:00
|
|
|
StoreInst *S0 = cast<StoreInst>(Chain[0]);
|
2016-07-01 08:37:01 +08:00
|
|
|
|
[LSV] Avoid adding vectors of pointers as candidates
Summary:
We no longer add vectors of pointers as candidates for
load/store vectorization. It does not seem to work anyway,
but without this patch we can end up in asserts when trying
to create casts between an integer type and the pointer of
vectors type.
The test case I've added used to assert like this when trying to
cast between i64 and <2 x i16*>:
opt: ../lib/IR/Instructions.cpp:2565: Assertion `castIsValid(op, S, Ty) && "Invalid cast!"' failed.
#0 PrintStackTraceSignalHandler(void*)
#1 SignalHandler(int)
#2 __restore_rt
#3 __GI_raise
#4 __GI_abort
#5 __GI___assert_fail
#6 llvm::CastInst::Create(llvm::Instruction::CastOps, llvm::Value*, llvm::Type*, llvm::Twine const&, llvm::Instruction*)
#7 llvm::IRBuilder<llvm::ConstantFolder, llvm::IRBuilderDefaultInserter>::CreateBitOrPointerCast(llvm::Value*, llvm::Type*, llvm::Twine const&)
#8 Vectorizer::vectorizeStoreChain(llvm::ArrayRef<llvm::Instruction*>, llvm::SmallPtrSet<llvm::Instruction*, 16u>*)
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: nhaehnle, llvm-commits
Differential Revision: https://reviews.llvm.org/D39296
llvm-svn: 316665
2017-10-26 21:59:15 +08:00
|
|
|
// If the vector has an int element, default to int for the whole store.
|
2016-07-01 08:37:01 +08:00
|
|
|
Type *StoreTy;
|
2016-07-28 07:06:00 +08:00
|
|
|
for (Instruction *I : Chain) {
|
|
|
|
StoreTy = cast<StoreInst>(I)->getValueOperand()->getType();
|
2016-07-01 08:37:01 +08:00
|
|
|
if (StoreTy->isIntOrIntVectorTy())
|
|
|
|
break;
|
2016-07-01 09:55:52 +08:00
|
|
|
|
|
|
|
if (StoreTy->isPtrOrPtrVectorTy()) {
|
|
|
|
StoreTy = Type::getIntNTy(F.getParent()->getContext(),
|
|
|
|
DL.getTypeSizeInBits(StoreTy));
|
|
|
|
break;
|
|
|
|
}
|
2016-07-01 08:37:01 +08:00
|
|
|
}
|
|
|
|
|
2016-07-01 07:11:38 +08:00
|
|
|
unsigned Sz = DL.getTypeSizeInBits(StoreTy);
|
2016-07-01 10:07:22 +08:00
|
|
|
unsigned AS = S0->getPointerAddressSpace();
|
|
|
|
unsigned VecRegSize = TTI.getLoadStoreVecRegBitWidth(AS);
|
2016-07-01 07:11:38 +08:00
|
|
|
unsigned VF = VecRegSize / Sz;
|
|
|
|
unsigned ChainSize = Chain.size();
|
2016-10-03 18:31:34 +08:00
|
|
|
unsigned Alignment = getAlignment(S0);
|
2016-07-01 07:11:38 +08:00
|
|
|
|
2016-07-14 05:20:01 +08:00
|
|
|
if (!isPowerOf2_32(Sz) || VF < 2 || ChainSize < 2) {
|
|
|
|
InstructionsProcessed->insert(Chain.begin(), Chain.end());
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-07-28 07:06:00 +08:00
|
|
|
ArrayRef<Instruction *> NewChain = getVectorizablePrefix(Chain);
|
2016-07-20 07:19:20 +08:00
|
|
|
if (NewChain.empty()) {
|
2016-07-21 04:07:34 +08:00
|
|
|
// No vectorization possible.
|
2016-07-14 05:20:01 +08:00
|
|
|
InstructionsProcessed->insert(Chain.begin(), Chain.end());
|
2016-07-01 07:11:38 +08:00
|
|
|
return false;
|
2016-07-14 05:20:01 +08:00
|
|
|
}
|
2016-07-20 07:19:20 +08:00
|
|
|
if (NewChain.size() == 1) {
|
2016-07-14 05:20:01 +08:00
|
|
|
// Failed after the first instruction. Discard it and try the smaller chain.
|
2016-07-20 07:19:20 +08:00
|
|
|
InstructionsProcessed->insert(NewChain.front());
|
2016-07-14 05:20:01 +08:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Update Chain to the valid vectorizable subchain.
|
2016-07-20 07:19:20 +08:00
|
|
|
Chain = NewChain;
|
2016-07-14 05:20:01 +08:00
|
|
|
ChainSize = Chain.size();
|
2016-07-01 07:11:38 +08:00
|
|
|
|
2016-10-03 18:31:34 +08:00
|
|
|
// Check if it's legal to vectorize this chain. If not, split the chain and
|
|
|
|
// try again.
|
2016-09-10 06:20:14 +08:00
|
|
|
unsigned EltSzInBytes = Sz / 8;
|
|
|
|
unsigned SzInBytes = EltSzInBytes * ChainSize;
|
2016-07-01 07:11:38 +08:00
|
|
|
|
|
|
|
VectorType *VecTy;
|
|
|
|
VectorType *VecStoreTy = dyn_cast<VectorType>(StoreTy);
|
|
|
|
if (VecStoreTy)
|
|
|
|
VecTy = VectorType::get(StoreTy->getScalarType(),
|
|
|
|
Chain.size() * VecStoreTy->getNumElements());
|
|
|
|
else
|
|
|
|
VecTy = VectorType::get(StoreTy, Chain.size());
|
|
|
|
|
2016-10-03 18:31:34 +08:00
|
|
|
// If it's more than the max vector size or the target has a better
|
|
|
|
// vector factor, break it into two pieces.
|
|
|
|
unsigned TargetVF = TTI.getStoreVectorFactor(VF, Sz, SzInBytes, VecTy);
|
|
|
|
if (ChainSize > VF || (VF != TargetVF && TargetVF < ChainSize)) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LSV: Chain doesn't match with the vector factor."
|
|
|
|
" Creating two separate arrays.\n");
|
2016-10-03 18:31:34 +08:00
|
|
|
return vectorizeStoreChain(Chain.slice(0, TargetVF),
|
|
|
|
InstructionsProcessed) |
|
|
|
|
vectorizeStoreChain(Chain.slice(TargetVF), InstructionsProcessed);
|
2016-07-01 07:11:38 +08:00
|
|
|
}
|
|
|
|
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG({
|
2016-07-01 07:11:38 +08:00
|
|
|
dbgs() << "LSV: Stores to vectorize:\n";
|
2016-07-28 07:06:00 +08:00
|
|
|
for (Instruction *I : Chain)
|
|
|
|
dbgs() << " " << *I << "\n";
|
2016-07-08 04:10:35 +08:00
|
|
|
});
|
2016-07-01 07:11:38 +08:00
|
|
|
|
2016-07-14 05:20:01 +08:00
|
|
|
// We won't try again to vectorize the elements of the chain, regardless of
|
|
|
|
// whether we succeed below.
|
|
|
|
InstructionsProcessed->insert(Chain.begin(), Chain.end());
|
|
|
|
|
2016-07-01 07:11:38 +08:00
|
|
|
// If the store is going to be misaligned, don't vectorize it.
|
2016-07-12 04:46:17 +08:00
|
|
|
if (accessIsMisaligned(SzInBytes, AS, Alignment)) {
|
2018-09-18 10:05:44 +08:00
|
|
|
if (S0->getPointerAddressSpace() != DL.getAllocaAddrSpace()) {
|
|
|
|
auto Chains = splitOddVectorElts(Chain, Sz);
|
|
|
|
return vectorizeStoreChain(Chains.first, InstructionsProcessed) |
|
|
|
|
vectorizeStoreChain(Chains.second, InstructionsProcessed);
|
|
|
|
}
|
2016-07-12 04:46:17 +08:00
|
|
|
|
2016-09-10 06:20:14 +08:00
|
|
|
unsigned NewAlign = getOrEnforceKnownAlignment(S0->getPointerOperand(),
|
|
|
|
StackAdjustedAlignment,
|
2016-12-19 16:22:17 +08:00
|
|
|
DL, S0, nullptr, &DT);
|
2018-09-18 10:05:44 +08:00
|
|
|
if (NewAlign != 0)
|
|
|
|
Alignment = NewAlign;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!TTI.isLegalToVectorizeStoreChain(SzInBytes, Alignment, AS)) {
|
|
|
|
auto Chains = splitOddVectorElts(Chain, Sz);
|
|
|
|
return vectorizeStoreChain(Chains.first, InstructionsProcessed) |
|
|
|
|
vectorizeStoreChain(Chains.second, InstructionsProcessed);
|
2016-07-01 07:11:38 +08:00
|
|
|
}
|
|
|
|
|
2016-07-20 07:19:20 +08:00
|
|
|
BasicBlock::iterator First, Last;
|
|
|
|
std::tie(First, Last) = getBoundaryInstrs(Chain);
|
2016-07-01 07:11:38 +08:00
|
|
|
Builder.SetInsertPoint(&*Last);
|
|
|
|
|
|
|
|
Value *Vec = UndefValue::get(VecTy);
|
|
|
|
|
|
|
|
if (VecStoreTy) {
|
|
|
|
unsigned VecWidth = VecStoreTy->getNumElements();
|
|
|
|
for (unsigned I = 0, E = Chain.size(); I != E; ++I) {
|
|
|
|
StoreInst *Store = cast<StoreInst>(Chain[I]);
|
|
|
|
for (unsigned J = 0, NE = VecStoreTy->getNumElements(); J != NE; ++J) {
|
|
|
|
unsigned NewIdx = J + I * VecWidth;
|
|
|
|
Value *Extract = Builder.CreateExtractElement(Store->getValueOperand(),
|
|
|
|
Builder.getInt32(J));
|
|
|
|
if (Extract->getType() != StoreTy->getScalarType())
|
|
|
|
Extract = Builder.CreateBitCast(Extract, StoreTy->getScalarType());
|
|
|
|
|
2016-07-08 04:10:35 +08:00
|
|
|
Value *Insert =
|
|
|
|
Builder.CreateInsertElement(Vec, Extract, Builder.getInt32(NewIdx));
|
2016-07-01 07:11:38 +08:00
|
|
|
Vec = Insert;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
for (unsigned I = 0, E = Chain.size(); I != E; ++I) {
|
|
|
|
StoreInst *Store = cast<StoreInst>(Chain[I]);
|
|
|
|
Value *Extract = Store->getValueOperand();
|
|
|
|
if (Extract->getType() != StoreTy->getScalarType())
|
2016-07-08 04:10:35 +08:00
|
|
|
Extract =
|
|
|
|
Builder.CreateBitOrPointerCast(Extract, StoreTy->getScalarType());
|
2016-07-01 07:11:38 +08:00
|
|
|
|
2016-07-08 04:10:35 +08:00
|
|
|
Value *Insert =
|
|
|
|
Builder.CreateInsertElement(Vec, Extract, Builder.getInt32(I));
|
2016-07-01 07:11:38 +08:00
|
|
|
Vec = Insert;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-09-18 10:05:44 +08:00
|
|
|
StoreInst *SI = Builder.CreateAlignedStore(
|
|
|
|
Vec,
|
|
|
|
Builder.CreateBitCast(S0->getPointerOperand(), VecTy->getPointerTo(AS)),
|
|
|
|
Alignment);
|
2016-07-01 07:11:38 +08:00
|
|
|
propagateMetadata(SI, Chain);
|
|
|
|
|
|
|
|
eraseInstructions(Chain);
|
|
|
|
++NumVectorInstructions;
|
|
|
|
NumScalarsVectorized += Chain.size();
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2016-07-14 05:20:01 +08:00
|
|
|
bool Vectorizer::vectorizeLoadChain(
|
2016-07-28 07:06:00 +08:00
|
|
|
ArrayRef<Instruction *> Chain,
|
|
|
|
SmallPtrSet<Instruction *, 16> *InstructionsProcessed) {
|
2016-07-01 07:11:38 +08:00
|
|
|
LoadInst *L0 = cast<LoadInst>(Chain[0]);
|
2016-07-01 08:37:01 +08:00
|
|
|
|
|
|
|
// If the vector has an int element, default to int for the whole load.
|
|
|
|
Type *LoadTy;
|
|
|
|
for (const auto &V : Chain) {
|
|
|
|
LoadTy = cast<LoadInst>(V)->getType();
|
|
|
|
if (LoadTy->isIntOrIntVectorTy())
|
|
|
|
break;
|
2016-07-01 09:55:52 +08:00
|
|
|
|
|
|
|
if (LoadTy->isPtrOrPtrVectorTy()) {
|
|
|
|
LoadTy = Type::getIntNTy(F.getParent()->getContext(),
|
|
|
|
DL.getTypeSizeInBits(LoadTy));
|
|
|
|
break;
|
|
|
|
}
|
2016-07-01 08:37:01 +08:00
|
|
|
}
|
|
|
|
|
2016-07-01 07:11:38 +08:00
|
|
|
unsigned Sz = DL.getTypeSizeInBits(LoadTy);
|
2016-07-01 10:07:22 +08:00
|
|
|
unsigned AS = L0->getPointerAddressSpace();
|
|
|
|
unsigned VecRegSize = TTI.getLoadStoreVecRegBitWidth(AS);
|
2016-07-01 07:11:38 +08:00
|
|
|
unsigned VF = VecRegSize / Sz;
|
|
|
|
unsigned ChainSize = Chain.size();
|
2016-10-03 18:31:34 +08:00
|
|
|
unsigned Alignment = getAlignment(L0);
|
2016-07-01 07:11:38 +08:00
|
|
|
|
2016-07-14 05:20:01 +08:00
|
|
|
if (!isPowerOf2_32(Sz) || VF < 2 || ChainSize < 2) {
|
|
|
|
InstructionsProcessed->insert(Chain.begin(), Chain.end());
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-07-28 07:06:00 +08:00
|
|
|
ArrayRef<Instruction *> NewChain = getVectorizablePrefix(Chain);
|
2016-07-20 07:19:20 +08:00
|
|
|
if (NewChain.empty()) {
|
2016-07-21 04:07:34 +08:00
|
|
|
// No vectorization possible.
|
2016-07-14 05:20:01 +08:00
|
|
|
InstructionsProcessed->insert(Chain.begin(), Chain.end());
|
|
|
|
return false;
|
|
|
|
}
|
2016-07-20 07:19:20 +08:00
|
|
|
if (NewChain.size() == 1) {
|
2016-07-14 05:20:01 +08:00
|
|
|
// Failed after the first instruction. Discard it and try the smaller chain.
|
2016-07-20 07:19:20 +08:00
|
|
|
InstructionsProcessed->insert(NewChain.front());
|
2016-07-01 07:11:38 +08:00
|
|
|
return false;
|
2016-07-14 05:20:01 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
// Update Chain to the valid vectorizable subchain.
|
2016-07-20 07:19:20 +08:00
|
|
|
Chain = NewChain;
|
2016-07-14 05:20:01 +08:00
|
|
|
ChainSize = Chain.size();
|
2016-07-01 07:11:38 +08:00
|
|
|
|
2016-10-03 18:31:34 +08:00
|
|
|
// Check if it's legal to vectorize this chain. If not, split the chain and
|
|
|
|
// try again.
|
2016-09-10 06:20:14 +08:00
|
|
|
unsigned EltSzInBytes = Sz / 8;
|
|
|
|
unsigned SzInBytes = EltSzInBytes * ChainSize;
|
2016-07-01 07:11:38 +08:00
|
|
|
VectorType *VecTy;
|
|
|
|
VectorType *VecLoadTy = dyn_cast<VectorType>(LoadTy);
|
|
|
|
if (VecLoadTy)
|
|
|
|
VecTy = VectorType::get(LoadTy->getScalarType(),
|
|
|
|
Chain.size() * VecLoadTy->getNumElements());
|
|
|
|
else
|
|
|
|
VecTy = VectorType::get(LoadTy, Chain.size());
|
|
|
|
|
2016-10-03 18:31:34 +08:00
|
|
|
// If it's more than the max vector size or the target has a better
|
|
|
|
// vector factor, break it into two pieces.
|
|
|
|
unsigned TargetVF = TTI.getLoadVectorFactor(VF, Sz, SzInBytes, VecTy);
|
|
|
|
if (ChainSize > VF || (VF != TargetVF && TargetVF < ChainSize)) {
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LSV: Chain doesn't match with the vector factor."
|
|
|
|
" Creating two separate arrays.\n");
|
2016-10-03 18:31:34 +08:00
|
|
|
return vectorizeLoadChain(Chain.slice(0, TargetVF), InstructionsProcessed) |
|
|
|
|
vectorizeLoadChain(Chain.slice(TargetVF), InstructionsProcessed);
|
2016-07-01 07:11:38 +08:00
|
|
|
}
|
|
|
|
|
2016-07-14 05:20:01 +08:00
|
|
|
// We won't try again to vectorize the elements of the chain, regardless of
|
|
|
|
// whether we succeed below.
|
|
|
|
InstructionsProcessed->insert(Chain.begin(), Chain.end());
|
|
|
|
|
2016-07-01 07:11:38 +08:00
|
|
|
// If the load is going to be misaligned, don't vectorize it.
|
2016-07-12 04:46:17 +08:00
|
|
|
if (accessIsMisaligned(SzInBytes, AS, Alignment)) {
|
2018-09-18 10:05:44 +08:00
|
|
|
if (L0->getPointerAddressSpace() != DL.getAllocaAddrSpace()) {
|
|
|
|
auto Chains = splitOddVectorElts(Chain, Sz);
|
|
|
|
return vectorizeLoadChain(Chains.first, InstructionsProcessed) |
|
|
|
|
vectorizeLoadChain(Chains.second, InstructionsProcessed);
|
|
|
|
}
|
2016-07-12 04:46:17 +08:00
|
|
|
|
2016-09-10 06:20:14 +08:00
|
|
|
unsigned NewAlign = getOrEnforceKnownAlignment(L0->getPointerOperand(),
|
|
|
|
StackAdjustedAlignment,
|
2016-12-19 16:22:17 +08:00
|
|
|
DL, L0, nullptr, &DT);
|
2018-09-18 10:05:44 +08:00
|
|
|
if (NewAlign != 0)
|
|
|
|
Alignment = NewAlign;
|
2016-09-10 06:20:14 +08:00
|
|
|
|
|
|
|
Alignment = NewAlign;
|
2016-07-01 07:11:38 +08:00
|
|
|
}
|
|
|
|
|
2018-09-18 10:05:44 +08:00
|
|
|
if (!TTI.isLegalToVectorizeLoadChain(SzInBytes, Alignment, AS)) {
|
|
|
|
auto Chains = splitOddVectorElts(Chain, Sz);
|
|
|
|
return vectorizeLoadChain(Chains.first, InstructionsProcessed) |
|
|
|
|
vectorizeLoadChain(Chains.second, InstructionsProcessed);
|
|
|
|
}
|
|
|
|
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG({
|
2016-07-01 07:11:38 +08:00
|
|
|
dbgs() << "LSV: Loads to vectorize:\n";
|
2016-07-28 07:06:00 +08:00
|
|
|
for (Instruction *I : Chain)
|
|
|
|
I->dump();
|
2016-07-08 04:10:35 +08:00
|
|
|
});
|
2016-07-01 07:11:38 +08:00
|
|
|
|
2016-07-20 07:19:20 +08:00
|
|
|
// getVectorizablePrefix already computed getBoundaryInstrs. The value of
|
|
|
|
// Last may have changed since then, but the value of First won't have. If it
|
|
|
|
// matters, we could compute getBoundaryInstrs only once and reuse it here.
|
|
|
|
BasicBlock::iterator First, Last;
|
|
|
|
std::tie(First, Last) = getBoundaryInstrs(Chain);
|
Correct ordering of loads/stores.
Summary:
Aiming to correct the ordering of loads/stores. This patch changes the
insert point for loads to the position of the first load.
It updates the ordering method for loads to insert before, rather than after.
Before this patch the following sequence:
"load a[1], store a[1], store a[0], load a[2]"
Would incorrectly vectorize to "store a[0,1], load a[1,2]".
The correctness check was assuming the insertion point for loads is at
the position of the first load, when in practice it was at the last
load. An alternative fix would have been to invert the correctness check.
The current fix changes insert position but also requires reordering of
instructions before the vectorized load.
Updated testcases to reflect the changes.
Reviewers: tstellarAMD, llvm-commits, jlebar, arsenm
Subscribers: mzolotukhin
Differential Revision: http://reviews.llvm.org/D22071
llvm-svn: 275117
2016-07-12 06:34:29 +08:00
|
|
|
Builder.SetInsertPoint(&*First);
|
2016-07-01 07:11:38 +08:00
|
|
|
|
|
|
|
Value *Bitcast =
|
2016-07-08 04:10:35 +08:00
|
|
|
Builder.CreateBitCast(L0->getPointerOperand(), VecTy->getPointerTo(AS));
|
2018-09-18 10:05:44 +08:00
|
|
|
LoadInst *LI = Builder.CreateAlignedLoad(Bitcast, Alignment);
|
2016-07-01 07:11:38 +08:00
|
|
|
propagateMetadata(LI, Chain);
|
|
|
|
|
|
|
|
if (VecLoadTy) {
|
|
|
|
SmallVector<Instruction *, 16> InstrsToErase;
|
|
|
|
|
|
|
|
unsigned VecWidth = VecLoadTy->getNumElements();
|
|
|
|
for (unsigned I = 0, E = Chain.size(); I != E; ++I) {
|
|
|
|
for (auto Use : Chain[I]->users()) {
|
2016-07-28 07:06:00 +08:00
|
|
|
// All users of vector loads are ExtractElement instructions with
|
|
|
|
// constant indices, otherwise we would have bailed before now.
|
2016-07-01 07:11:38 +08:00
|
|
|
Instruction *UI = cast<Instruction>(Use);
|
|
|
|
unsigned Idx = cast<ConstantInt>(UI->getOperand(1))->getZExtValue();
|
|
|
|
unsigned NewIdx = Idx + I * VecWidth;
|
2016-09-07 23:49:48 +08:00
|
|
|
Value *V = Builder.CreateExtractElement(LI, Builder.getInt32(NewIdx),
|
|
|
|
UI->getName());
|
2016-07-28 07:06:00 +08:00
|
|
|
if (V->getType() != UI->getType())
|
|
|
|
V = Builder.CreateBitCast(V, UI->getType());
|
2016-07-01 07:11:38 +08:00
|
|
|
|
|
|
|
// Replace the old instruction.
|
2016-07-28 07:06:00 +08:00
|
|
|
UI->replaceAllUsesWith(V);
|
2016-07-01 07:11:38 +08:00
|
|
|
InstrsToErase.push_back(UI);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-07-28 05:45:48 +08:00
|
|
|
// Bitcast might not be an Instruction, if the value being loaded is a
|
|
|
|
// constant. In that case, no need to reorder anything.
|
|
|
|
if (Instruction *BitcastInst = dyn_cast<Instruction>(Bitcast))
|
|
|
|
reorder(BitcastInst);
|
2016-07-01 07:11:38 +08:00
|
|
|
|
|
|
|
for (auto I : InstrsToErase)
|
|
|
|
I->eraseFromParent();
|
|
|
|
} else {
|
|
|
|
for (unsigned I = 0, E = Chain.size(); I != E; ++I) {
|
2016-07-28 07:06:00 +08:00
|
|
|
Value *CV = Chain[I];
|
2016-09-07 23:49:48 +08:00
|
|
|
Value *V =
|
|
|
|
Builder.CreateExtractElement(LI, Builder.getInt32(I), CV->getName());
|
2016-07-28 07:06:00 +08:00
|
|
|
if (V->getType() != CV->getType()) {
|
|
|
|
V = Builder.CreateBitOrPointerCast(V, CV->getType());
|
2016-07-01 09:55:52 +08:00
|
|
|
}
|
2016-07-01 07:11:38 +08:00
|
|
|
|
|
|
|
// Replace the old instruction.
|
2016-07-28 07:06:00 +08:00
|
|
|
CV->replaceAllUsesWith(V);
|
2016-07-01 07:11:38 +08:00
|
|
|
}
|
|
|
|
|
2016-07-28 05:45:48 +08:00
|
|
|
if (Instruction *BitcastInst = dyn_cast<Instruction>(Bitcast))
|
|
|
|
reorder(BitcastInst);
|
2016-07-01 07:11:38 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
eraseInstructions(Chain);
|
|
|
|
|
|
|
|
++NumVectorInstructions;
|
|
|
|
NumScalarsVectorized += Chain.size();
|
|
|
|
return true;
|
|
|
|
}
|
2016-07-12 04:46:17 +08:00
|
|
|
|
|
|
|
bool Vectorizer::accessIsMisaligned(unsigned SzInBytes, unsigned AddressSpace,
|
|
|
|
unsigned Alignment) {
|
2016-08-05 00:38:44 +08:00
|
|
|
if (Alignment % SzInBytes == 0)
|
|
|
|
return false;
|
2016-09-10 06:20:14 +08:00
|
|
|
|
2016-07-12 04:46:17 +08:00
|
|
|
bool Fast = false;
|
2016-08-05 00:38:44 +08:00
|
|
|
bool Allows = TTI.allowsMisalignedMemoryAccesses(F.getParent()->getContext(),
|
|
|
|
SzInBytes * 8, AddressSpace,
|
2016-07-12 04:46:17 +08:00
|
|
|
Alignment, &Fast);
|
2018-05-14 20:53:11 +08:00
|
|
|
LLVM_DEBUG(dbgs() << "LSV: Target said misaligned is allowed? " << Allows
|
|
|
|
<< " and fast? " << Fast << "\n";);
|
2016-08-05 00:38:44 +08:00
|
|
|
return !Allows || !Fast;
|
2016-07-12 04:46:17 +08:00
|
|
|
}
|