forked from OSchip/llvm-project
47 lines
1.5 KiB
LLVM
47 lines
1.5 KiB
LLVM
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; RUN: llc -march=hexagon -mcpu=hexagonv5 -enable-pipeliner < %s | FileCheck %s
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; RUN: llc -march=hexagon -mcpu=hexagonv62 -enable-pipeliner < %s | FileCheck --check-prefix=CHECK-V62 %s
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; RUN: llc -march=hexagon -mcpu=hexagonv65 -enable-pipeliner < %s | FileCheck --check-prefix=CHECK-V65 %s
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;
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; Make sure we pipeline the loop and that we generate the correct
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; base+offset values for the loads.
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; CHECK: loop0(.LBB0_[[LOOP:.]],
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; CHECK: .LBB0_[[LOOP]]:
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; CHECK: r{{[0-9]+}} = memw([[REG1:(r[0-9]+)]]+#{{[0,4]}})
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; CHECK: r{{[0-9]+}} = memw([[REG1]]++#4)
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; CHECK: }{{[ \t]*}}:endloop
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; CHECK-V62-NOT: }{{[ \t]*}}:mem_noshuf
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; CHECK-V65: }{{[ \t]*}}:mem_noshuf
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; Function Attrs: nounwind
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define void @f0() #0 {
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b0:
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br i1 undef, label %b1, label %b4
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b1: ; preds = %b1, %b0
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%v0 = phi i32 [ %v7, %b1 ], [ 0, %b0 ]
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%v1 = getelementptr inbounds i8*, i8** undef, i32 %v0
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%v2 = load i8*, i8** %v1, align 4
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%v3 = bitcast i8* %v2 to i32*
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store i32 0, i32* %v3, align 4
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%v4 = load i8*, i8** %v1, align 4
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%v5 = getelementptr inbounds i8, i8* %v4, i32 8
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%v6 = bitcast i8* %v5 to i32*
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store i32 0, i32* %v6, align 4
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%v7 = add nsw i32 %v0, 1
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%v8 = icmp eq i32 %v7, 2
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br i1 %v8, label %b2, label %b1
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b2: ; preds = %b1
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br i1 undef, label %b3, label %b4
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b3: ; preds = %b2
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unreachable
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b4: ; preds = %b2, %b0
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unreachable
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}
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attributes #0 = { nounwind }
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