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llvm-project/llvm/test/CodeGen/Mips/inlineasm_constraint_R.ll

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[mips] Make Static a default relocation model for MIPS codegen This change follows up defaults for GCC and Clang, so LLVM does not differ from them. While number of the test files are touched with this change, they all keep the old (expected) behaviour with the explicit option: "-relocation-model=pic" The tests that have not been touched are insensitive to relocation model. Differential Revision: http://reviews.llvm.org/D17995 llvm-svn: 265949
2016-04-11 23:24:23 +08:00
; RUN: llc -march=mipsel -relocation-model=pic < %s | FileCheck %s
[mips] Support 9-bit offsets for the 'R' inline assembly memory constraint. Summary: The 'R' constraint is actually supposed to be much more complicated than this and is defined in terms of whether it will cause macro expansion in the assembler. 'R' is getting less useful due to architecture changes and ought to be replaced by other constraints. We therefore implement 9-bit offsets which will work for all subtargets and all instructions. Reviewers: vkalintiris Reviewed By: vkalintiris Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8440 llvm-svn: 233537
2015-03-30 21:27:25 +08:00
@data = global [8193 x i32] zeroinitializer
define void @R(i32 *%p) nounwind {
entry:
; CHECK-LABEL: R:
call void asm sideeffect "lw $$1, $0", "*R,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 0))
; CHECK: lw $[[BASEPTR:[0-9]+]], %got(data)(
; CHECK: #APP
; CHECK: lw $1, 0($[[BASEPTR]])
; CHECK: #NO_APP
ret void
}
define void @R_offset_4(i32 *%p) nounwind {
entry:
; CHECK-LABEL: R_offset_4:
call void asm sideeffect "lw $$1, $0", "*R,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 1))
; CHECK: lw $[[BASEPTR:[0-9]+]], %got(data)(
; CHECK: #APP
; CHECK: lw $1, 4($[[BASEPTR]])
; CHECK: #NO_APP
ret void
}
define void @R_offset_254(i32 *%p) nounwind {
entry:
; CHECK-LABEL: R_offset_254:
call void asm sideeffect "lw $$1, $0", "*R,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 63))
; CHECK-DAG: lw $[[BASEPTR:[0-9]+]], %got(data)(
; CHECK: #APP
; CHECK: lw $1, 252($[[BASEPTR]])
; CHECK: #NO_APP
ret void
}
define void @R_offset_256(i32 *%p) nounwind {
entry:
; CHECK-LABEL: R_offset_256:
call void asm sideeffect "lw $$1, $0", "*R,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 64))
; CHECK-DAG: lw $[[BASEPTR:[0-9]+]], %got(data)(
; CHECK: addiu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], 256
; CHECK: #APP
; CHECK: lw $1, 0($[[BASEPTR2]])
; CHECK: #NO_APP
ret void
}