2011-09-10 07:14:58 +08:00
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|
; RUN: llc -march=mipsel < %s | FileCheck %s
|
2011-06-21 08:40:49 +08:00
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|
Mips specific inline asm operand modifier 'D'
Modifier 'D' is to use the second word of a double integer.
We had previously implemented the pure register varient of
the modifier and this patch implements the memory reference.
#include "stdio.h"
int b[8] = {0,1,2,3,4,5,6,7};
void main()
{
int i;
// The first word. Notice, no 'D'
{asm (
"lw %0,%1;"
: "=r" (i)
: "m" (*(b+4))
);}
printf("%d\n",i);
// The second word
{asm (
"lw %0,%D1;"
: "=r" (i)
: "m" (*(b+4))
);}
printf("%d\n",i);
}
llvm-svn: 179135
2013-04-10 07:19:50 +08:00
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|
; Simple memory
|
2011-06-21 08:40:49 +08:00
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|
@g1 = external global i32
|
|
|
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|
|
|
|
define i32 @f1(i32 %x) nounwind {
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|
entry:
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; CHECK: addiu $[[T0:[0-9]+]], $sp
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; CHECK: #APP
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|
; CHECK: sw $4, 0($[[T0]])
|
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|
; CHECK: #NO_APP
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|
; CHECK: #APP
|
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|
; CHECK: lw $[[T3:[0-9]+]], 0($[[T0]])
|
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|
|
; CHECK: #NO_APP
|
2012-05-12 11:25:16 +08:00
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|
|
; CHECK: lw $[[T1:[0-9]+]], %got(g1)
|
2011-06-21 08:40:49 +08:00
|
|
|
; CHECK: sw $[[T3]], 0($[[T1]])
|
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|
|
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|
%l1 = alloca i32, align 4
|
|
|
|
call void asm "sw $1, $0", "=*m,r"(i32* %l1, i32 %x) nounwind
|
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|
|
%0 = call i32 asm "lw $0, $1", "=r,*m"(i32* %l1) nounwind
|
|
|
|
store i32 %0, i32* @g1, align 4
|
|
|
|
ret i32 %0
|
|
|
|
}
|
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|
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|
2013-04-11 06:02:32 +08:00
|
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|
; "D": Second word of double word. This works for any memory element
|
|
|
|
; double or single.
|
Mips specific inline asm operand modifier 'D'
Modifier 'D' is to use the second word of a double integer.
We had previously implemented the pure register varient of
the modifier and this patch implements the memory reference.
#include "stdio.h"
int b[8] = {0,1,2,3,4,5,6,7};
void main()
{
int i;
// The first word. Notice, no 'D'
{asm (
"lw %0,%1;"
: "=r" (i)
: "m" (*(b+4))
);}
printf("%d\n",i);
// The second word
{asm (
"lw %0,%D1;"
: "=r" (i)
: "m" (*(b+4))
);}
printf("%d\n",i);
}
llvm-svn: 179135
2013-04-10 07:19:50 +08:00
|
|
|
; CHECK: #APP
|
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|
|
; CHECK-NEXT: lw ${{[0-9]+}},4(${{[0-9]+}});
|
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|
; CHECK-NEXT: #NO_APP
|
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|
2013-04-11 06:02:32 +08:00
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|
; No "D": First word of double word. This works for any memory element
|
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|
; double or single.
|
|
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|
; CHECK: #APP
|
|
|
|
; CHECK-NEXT: lw ${{[0-9]+}},0(${{[0-9]+}});
|
|
|
|
; CHECK-NEXT: #NO_APP
|
|
|
|
|
2013-04-12 03:39:19 +08:00
|
|
|
;int b[8] = {0,1,2,3,4,5,6,7};
|
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|
|
;int main()
|
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|
;{
|
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|
; int i;
|
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|
;
|
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|
|
; // The first word. Notice, no 'D'
|
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|
|
; { asm (
|
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|
|
; "lw %0,%1;\n"
|
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|
|
; : "=r" (i) : "m" (*(b+4)));}
|
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|
;
|
|
|
|
; // The second word
|
|
|
|
; { asm (
|
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|
|
; "lw %0,%D1;\n"
|
|
|
|
; : "=r" (i) "m" (*(b+4)));}
|
|
|
|
;}
|
|
|
|
|
Mips specific inline asm operand modifier 'D'
Modifier 'D' is to use the second word of a double integer.
We had previously implemented the pure register varient of
the modifier and this patch implements the memory reference.
#include "stdio.h"
int b[8] = {0,1,2,3,4,5,6,7};
void main()
{
int i;
// The first word. Notice, no 'D'
{asm (
"lw %0,%1;"
: "=r" (i)
: "m" (*(b+4))
);}
printf("%d\n",i);
// The second word
{asm (
"lw %0,%D1;"
: "=r" (i)
: "m" (*(b+4))
);}
printf("%d\n",i);
}
llvm-svn: 179135
2013-04-10 07:19:50 +08:00
|
|
|
@b = common global [20 x i32] zeroinitializer, align 4
|
|
|
|
|
2013-04-11 06:02:32 +08:00
|
|
|
define void @main() {
|
Mips specific inline asm operand modifier 'D'
Modifier 'D' is to use the second word of a double integer.
We had previously implemented the pure register varient of
the modifier and this patch implements the memory reference.
#include "stdio.h"
int b[8] = {0,1,2,3,4,5,6,7};
void main()
{
int i;
// The first word. Notice, no 'D'
{asm (
"lw %0,%1;"
: "=r" (i)
: "m" (*(b+4))
);}
printf("%d\n",i);
// The second word
{asm (
"lw %0,%D1;"
: "=r" (i)
: "m" (*(b+4))
);}
printf("%d\n",i);
}
llvm-svn: 179135
2013-04-10 07:19:50 +08:00
|
|
|
entry:
|
2013-04-11 06:02:32 +08:00
|
|
|
tail call void asm sideeffect " lw $0,${1:D};", "r,*m,~{$11}"(i32 undef, i32* getelementptr inbounds ([20 x i32]* @b, i32 0, i32 3))
|
|
|
|
tail call void asm sideeffect " lw $0,${1};", "r,*m,~{$11}"(i32 undef, i32* getelementptr inbounds ([20 x i32]* @b, i32 0, i32 3))
|
Mips specific inline asm operand modifier 'D'
Modifier 'D' is to use the second word of a double integer.
We had previously implemented the pure register varient of
the modifier and this patch implements the memory reference.
#include "stdio.h"
int b[8] = {0,1,2,3,4,5,6,7};
void main()
{
int i;
// The first word. Notice, no 'D'
{asm (
"lw %0,%1;"
: "=r" (i)
: "m" (*(b+4))
);}
printf("%d\n",i);
// The second word
{asm (
"lw %0,%D1;"
: "=r" (i)
: "m" (*(b+4))
);}
printf("%d\n",i);
}
llvm-svn: 179135
2013-04-10 07:19:50 +08:00
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
2013-04-11 06:02:32 +08:00
|
|
|
attributes #0 = { nounwind }
|
Mips specific inline asm operand modifier 'D'
Modifier 'D' is to use the second word of a double integer.
We had previously implemented the pure register varient of
the modifier and this patch implements the memory reference.
#include "stdio.h"
int b[8] = {0,1,2,3,4,5,6,7};
void main()
{
int i;
// The first word. Notice, no 'D'
{asm (
"lw %0,%1;"
: "=r" (i)
: "m" (*(b+4))
);}
printf("%d\n",i);
// The second word
{asm (
"lw %0,%D1;"
: "=r" (i)
: "m" (*(b+4))
);}
printf("%d\n",i);
}
llvm-svn: 179135
2013-04-10 07:19:50 +08:00
|
|
|
|