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llvm-project/llvm/test/CodeGen/X86/fast-isel-bc.ll

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[X86][MMX] Regenerate MMX bitcast test llvm-svn: 325611
2018-02-21 02:48:29 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
X86: Do not use llc -march in tests. `llc -march` is problematic because it only switches the target architecture, but leaves the operating system unchanged. This occasionally leads to indeterministic tests because the OS from LLVM_DEFAULT_TARGET_TRIPLE is used. However we can simply always use `llc -mtriple` instead. This changes all the tests to do this to avoid people using -march when they copy and paste parts of tests. See also the discussion in https://reviews.llvm.org/D35287 llvm-svn: 309774
2017-08-02 08:28:10 +08:00
; RUN: llc < %s -O0 -mattr=+mmx,+sse2 | FileCheck %s
Teach X86FastISel how to handle CCValAssign::BCvt, which is used for MMX arguments. This fixes PR4684. llvm-svn: 78163
2009-08-05 13:33:42 +08:00
; PR4684
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin9.8"
Massive rewrite of MMX: The x86_mmx type is used for MMX intrinsics, parameters and return values where these use MMX registers, and is also supported in load, store, and bitcast. Only the above operations generate MMX instructions, and optimizations do not operate on or produce MMX intrinsics. MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into smaller pieces. Optimizations may occur on these forms and the result casted back to x86_mmx, provided the result feeds into a previous existing x86_mmx operation. The point of all this is prevent optimizations from introducing MMX operations, which is unsafe due to the EMMS problem. llvm-svn: 115243
2010-10-01 07:57:10 +08:00
declare void @func2(x86_mmx)
Teach X86FastISel how to handle CCValAssign::BCvt, which is used for MMX arguments. This fixes PR4684. llvm-svn: 78163
2009-08-05 13:33:42 +08:00
; This isn't spectacular, but it's MMX code at -O0...
Massive rewrite of MMX: The x86_mmx type is used for MMX intrinsics, parameters and return values where these use MMX registers, and is also supported in load, store, and bitcast. Only the above operations generate MMX instructions, and optimizations do not operate on or produce MMX intrinsics. MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into smaller pieces. Optimizations may occur on these forms and the result casted back to x86_mmx, provided the result feeds into a previous existing x86_mmx operation. The point of all this is prevent optimizations from introducing MMX operations, which is unsafe due to the EMMS problem. llvm-svn: 115243
2010-10-01 07:57:10 +08:00
; For now, handling of x86_mmx parameters in fast Isel is unimplemented,
; so we get pretty poor code. The below is preferable.
; CHEK: movl $2, %eax
; CHEK: movd %rax, %mm0
; CHEK: movd %mm0, %rdi
Teach X86FastISel how to handle CCValAssign::BCvt, which is used for MMX arguments. This fixes PR4684. llvm-svn: 78163
2009-08-05 13:33:42 +08:00
[X86][MMX] Regenerate MMX bitcast test llvm-svn: 325611
2018-02-21 02:48:29 +08:00
define void @func1() nounwind {
; CHECK-LABEL: func1:
; CHECK: ## %bb.0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: movl $2, %eax
; CHECK-NEXT: movl %eax, %ecx
; CHECK-NEXT: movq %rcx, %xmm0
; CHECK-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; CHECK-NEXT: movq %xmm0, (%rsp)
; CHECK-NEXT: movq (%rsp), %mm0
; CHECK-NEXT: movq2dq %mm0, %xmm0
; CHECK-NEXT: callq _func2
; CHECK-NEXT: popq %rax
; CHECK-NEXT: retq
%tmp0 = bitcast <2 x i32> <i32 0, i32 2> to x86_mmx
call void @func2(x86_mmx %tmp0)
ret void
Teach X86FastISel how to handle CCValAssign::BCvt, which is used for MMX arguments. This fixes PR4684. llvm-svn: 78163
2009-08-05 13:33:42 +08:00
}