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llvm-project/llvm/test/MC/WebAssembly/simd-encodings.s

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[WebAssembly] Add unimplemented-simd128 subtarget feature Summary: This is a third attempt, but this time we have vetted it on Windows first. The previous errors were due to an uninitialized class member. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, sunfish, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D56560 llvm-svn: 350901
2019-01-11 06:32:11 +08:00
# RUN: llvm-mc -show-encoding -triple=wasm32-unkown-unknown -mattr=+unimplemented-simd128 < %s | FileCheck %s
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Make assembler check for proper nesting of control flow. Summary: It does so using a simple nesting stack, and gives clear errors upon violation. This is unique to wasm, since most CPUs do not have any nested constructs. Had to add an end of file check to the general assembler for this. Note: if/else/end instructions are not currently supported in our tablegen defs, so these tests will be enabled in a follow-up. They already pass the nesting check. Reviewers: dschuff, aheejin Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D55797 llvm-svn: 350078
2018-12-27 06:46:18 +08:00
main:
.functype main () -> ()
[WebAssembly] Fix p2align in assembler. Summary: - Match the syntax output by InstPrinter. - Fix it always emitting 0 for align. Had to work around fact that opcode is not available for GetDefaultP2Align while parsing. - Updated tests that were erroneously happy with a p2align=0 Fixes https://bugs.llvm.org/show_bug.cgi?id=40752 Reviewers: aheejin, sbc100 Subscribers: jgravelle-google, sunfish, jfb, llvm-commits, dschuff Tags: #llvm Differential Revision: https://reviews.llvm.org/D63633 llvm-svn: 364570
2019-06-28 02:11:15 +08:00
# CHECK: v128.load 48 # encoding: [0xfd,0x00,0x04,0x30]
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
v128.load 48
[WebAssembly] Fix p2align in assembler. Summary: - Match the syntax output by InstPrinter. - Fix it always emitting 0 for align. Had to work around fact that opcode is not available for GetDefaultP2Align while parsing. - Updated tests that were erroneously happy with a p2align=0 Fixes https://bugs.llvm.org/show_bug.cgi?id=40752 Reviewers: aheejin, sbc100 Subscribers: jgravelle-google, sunfish, jfb, llvm-commits, dschuff Tags: #llvm Differential Revision: https://reviews.llvm.org/D63633 llvm-svn: 364570
2019-06-28 02:11:15 +08:00
# CHECK: v128.store 48 # encoding: [0xfd,0x01,0x04,0x30]
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
v128.store 48
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
# CHECK: v128.const 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK-SAME: # encoding: [0xfd,0x02,
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
# CHECK-SAME: 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
# CHECK-SAME: 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f]
v128.const 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
# CHECK: v128.const 256, 770, 1284, 1798, 2312, 2826, 3340, 3854
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK-SAME: # encoding: [0xfd,0x02,
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
# CHECK-SAME: 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
# CHECK-SAME: 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f]
v128.const 256, 770, 1284, 1798, 2312, 2826, 3340, 3854
# TODO(tlively): Fix assembler so v128.const works with 4xi32 and 2xi64
# CHECK: v128.const 0x1.0402p-121, 0x1.0c0a08p-113,
# CHECK-SAME: 0x1.14121p-105, 0x1.1c1a18p-97
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK-SAME: # encoding: [0xfd,0x02,
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
# CHECK-SAME: 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
# CHECK-SAME: 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f]
v128.const 0x1.0402p-121, 0x1.0c0a08p-113, 0x1.14121p-105, 0x1.1c1a18p-97
# CHECK: v128.const 0x1.60504030201p-911, 0x1.e0d0c0b0a0908p-783
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK-SAME: # encoding: [0xfd,0x02,
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
# CHECK-SAME: 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
# CHECK-SAME: 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f]
v128.const 0x1.60504030201p-911, 0x1.e0d0c0b0a0908p-783
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: v8x16.shuffle 0, 17, 2, 19, 4, 21, 6, 23,
# CHECK-SAME: 8, 25, 10, 27, 12, 29, 14, 31
# CHECK-SAME: # encoding: [0xfd,0x03,
# CHECK-SAME: 0x00,0x11,0x02,0x13,0x04,0x15,0x06,0x17,
# CHECK-SAME: 0x08,0x19,0x0a,0x1b,0x0c,0x1d,0x0e,0x1f]
v8x16.shuffle 0, 17, 2, 19, 4, 21, 6, 23, 8, 25, 10, 27, 12, 29, 14, 31
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.splat # encoding: [0xfd,0x04]
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
i8x16.splat
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.extract_lane_s 15 # encoding: [0xfd,0x05,0x0f]
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
i8x16.extract_lane_s 15
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.extract_lane_u 15 # encoding: [0xfd,0x06,0x0f]
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
i8x16.extract_lane_u 15
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.replace_lane 15 # encoding: [0xfd,0x07,0x0f]
i8x16.replace_lane 15
# CHECK: i16x8.splat # encoding: [0xfd,0x08]
i16x8.splat
# CHECK: i16x8.extract_lane_s 7 # encoding: [0xfd,0x09,0x07]
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
i16x8.extract_lane_s 7
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.extract_lane_u 7 # encoding: [0xfd,0x0a,0x07]
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
i16x8.extract_lane_u 7
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.replace_lane 7 # encoding: [0xfd,0x0b,0x07]
i16x8.replace_lane 7
# CHECK: i32x4.splat # encoding: [0xfd,0x0c]
i32x4.splat
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
# CHECK: i32x4.extract_lane 3 # encoding: [0xfd,0x0d,0x03]
i32x4.extract_lane 3
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i32x4.replace_lane 3 # encoding: [0xfd,0x0e,0x03]
i32x4.replace_lane 3
# CHECK: i64x2.splat # encoding: [0xfd,0x0f]
i64x2.splat
# CHECK: i64x2.extract_lane 1 # encoding: [0xfd,0x10,0x01]
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
i64x2.extract_lane 1
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i64x2.replace_lane 1 # encoding: [0xfd,0x11,0x01]
i64x2.replace_lane 1
# CHECK: f32x4.splat # encoding: [0xfd,0x12]
f32x4.splat
# CHECK: f32x4.extract_lane 3 # encoding: [0xfd,0x13,0x03]
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
f32x4.extract_lane 3
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f32x4.replace_lane 3 # encoding: [0xfd,0x14,0x03]
f32x4.replace_lane 3
# CHECK: f64x2.splat # encoding: [0xfd,0x15]
f64x2.splat
# CHECK: f64x2.extract_lane 1 # encoding: [0xfd,0x16,0x01]
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
f64x2.extract_lane 1
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f64x2.replace_lane 1 # encoding: [0xfd,0x17,0x01]
f64x2.replace_lane 1
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.eq # encoding: [0xfd,0x18]
i8x16.eq
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.ne # encoding: [0xfd,0x19]
i8x16.ne
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.lt_s # encoding: [0xfd,0x1a]
i8x16.lt_s
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.lt_u # encoding: [0xfd,0x1b]
i8x16.lt_u
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.gt_s # encoding: [0xfd,0x1c]
i8x16.gt_s
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.gt_u # encoding: [0xfd,0x1d]
i8x16.gt_u
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.le_s # encoding: [0xfd,0x1e]
i8x16.le_s
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.le_u # encoding: [0xfd,0x1f]
i8x16.le_u
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.ge_s # encoding: [0xfd,0x20]
i8x16.ge_s
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.ge_u # encoding: [0xfd,0x21]
i8x16.ge_u
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.eq # encoding: [0xfd,0x22]
i16x8.eq
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.ne # encoding: [0xfd,0x23]
i16x8.ne
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.lt_s # encoding: [0xfd,0x24]
i16x8.lt_s
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.lt_u # encoding: [0xfd,0x25]
i16x8.lt_u
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.gt_s # encoding: [0xfd,0x26]
i16x8.gt_s
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.gt_u # encoding: [0xfd,0x27]
i16x8.gt_u
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.le_s # encoding: [0xfd,0x28]
i16x8.le_s
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.le_u # encoding: [0xfd,0x29]
i16x8.le_u
[WebAssembly] SIMD neg Summary: Depends on D52007. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52009 llvm-svn: 342296
2018-09-15 06:35:12 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.ge_s # encoding: [0xfd,0x2a]
i16x8.ge_s
[WebAssembly] SIMD neg Summary: Depends on D52007. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52009 llvm-svn: 342296
2018-09-15 06:35:12 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.ge_u # encoding: [0xfd,0x2b]
i16x8.ge_u
[WebAssembly] SIMD neg Summary: Depends on D52007. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52009 llvm-svn: 342296
2018-09-15 06:35:12 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i32x4.eq # encoding: [0xfd,0x2c]
i32x4.eq
[WebAssembly] SIMD neg Summary: Depends on D52007. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52009 llvm-svn: 342296
2018-09-15 06:35:12 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i32x4.ne # encoding: [0xfd,0x2d]
i32x4.ne
[WebAssembly] Saturating arithmetic intrinsics Summary: Depends on D52805. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52813 llvm-svn: 343833
2018-10-05 08:45:20 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i32x4.lt_s # encoding: [0xfd,0x2e]
i32x4.lt_s
[WebAssembly] Saturating arithmetic intrinsics Summary: Depends on D52805. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52813 llvm-svn: 343833
2018-10-05 08:45:20 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i32x4.lt_u # encoding: [0xfd,0x2f]
i32x4.lt_u
[WebAssembly] Saturating arithmetic intrinsics Summary: Depends on D52805. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52813 llvm-svn: 343833
2018-10-05 08:45:20 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i32x4.gt_s # encoding: [0xfd,0x30]
i32x4.gt_s
[WebAssembly] Saturating arithmetic intrinsics Summary: Depends on D52805. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52813 llvm-svn: 343833
2018-10-05 08:45:20 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i32x4.gt_u # encoding: [0xfd,0x31]
i32x4.gt_u
[WebAssembly] Saturating arithmetic intrinsics Summary: Depends on D52805. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52813 llvm-svn: 343833
2018-10-05 08:45:20 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i32x4.le_s # encoding: [0xfd,0x32]
i32x4.le_s
[WebAssembly] Saturating arithmetic intrinsics Summary: Depends on D52805. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52813 llvm-svn: 343833
2018-10-05 08:45:20 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i32x4.le_u # encoding: [0xfd,0x33]
i32x4.le_u
[WebAssembly] Saturating arithmetic intrinsics Summary: Depends on D52805. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52813 llvm-svn: 343833
2018-10-05 08:45:20 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i32x4.ge_s # encoding: [0xfd,0x34]
i32x4.ge_s
[WebAssembly] Saturating arithmetic intrinsics Summary: Depends on D52805. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52813 llvm-svn: 343833
2018-10-05 08:45:20 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i32x4.ge_u # encoding: [0xfd,0x35]
i32x4.ge_u
[WebAssembly] SIMD shifts Summary: Implement shifts of vectors by i32. Since LLVM defines shifts as binary operations between two vectors, this involves pattern matching on splatted shift operands. For v2i64 shifts any i32 shift operands have to be zero extended in the input and any i64 shift operands have to be wrapped in the output. Depends on D52007. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51906 llvm-svn: 342302
2018-09-15 08:45:31 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f32x4.eq # encoding: [0xfd,0x40]
f32x4.eq
[WebAssembly] SIMD shifts Summary: Implement shifts of vectors by i32. Since LLVM defines shifts as binary operations between two vectors, this involves pattern matching on splatted shift operands. For v2i64 shifts any i32 shift operands have to be zero extended in the input and any i64 shift operands have to be wrapped in the output. Depends on D52007. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51906 llvm-svn: 342302
2018-09-15 08:45:31 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f32x4.ne # encoding: [0xfd,0x41]
f32x4.ne
[WebAssembly] SIMD shifts Summary: Implement shifts of vectors by i32. Since LLVM defines shifts as binary operations between two vectors, this involves pattern matching on splatted shift operands. For v2i64 shifts any i32 shift operands have to be zero extended in the input and any i64 shift operands have to be wrapped in the output. Depends on D52007. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51906 llvm-svn: 342302
2018-09-15 08:45:31 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f32x4.lt # encoding: [0xfd,0x42]
f32x4.lt
[WebAssembly] SIMD shifts Summary: Implement shifts of vectors by i32. Since LLVM defines shifts as binary operations between two vectors, this involves pattern matching on splatted shift operands. For v2i64 shifts any i32 shift operands have to be zero extended in the input and any i64 shift operands have to be wrapped in the output. Depends on D52007. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51906 llvm-svn: 342302
2018-09-15 08:45:31 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f32x4.gt # encoding: [0xfd,0x43]
f32x4.gt
[WebAssembly] SIMD shifts Summary: Implement shifts of vectors by i32. Since LLVM defines shifts as binary operations between two vectors, this involves pattern matching on splatted shift operands. For v2i64 shifts any i32 shift operands have to be zero extended in the input and any i64 shift operands have to be wrapped in the output. Depends on D52007. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51906 llvm-svn: 342302
2018-09-15 08:45:31 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f32x4.le # encoding: [0xfd,0x44]
f32x4.le
[WebAssembly] SIMD shifts Summary: Implement shifts of vectors by i32. Since LLVM defines shifts as binary operations between two vectors, this involves pattern matching on splatted shift operands. For v2i64 shifts any i32 shift operands have to be zero extended in the input and any i64 shift operands have to be wrapped in the output. Depends on D52007. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51906 llvm-svn: 342302
2018-09-15 08:45:31 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f32x4.ge # encoding: [0xfd,0x45]
f32x4.ge
[WebAssembly] SIMD shifts Summary: Implement shifts of vectors by i32. Since LLVM defines shifts as binary operations between two vectors, this involves pattern matching on splatted shift operands. For v2i64 shifts any i32 shift operands have to be zero extended in the input and any i64 shift operands have to be wrapped in the output. Depends on D52007. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51906 llvm-svn: 342302
2018-09-15 08:45:31 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f64x2.eq # encoding: [0xfd,0x46]
f64x2.eq
[WebAssembly] SIMD shifts Summary: Implement shifts of vectors by i32. Since LLVM defines shifts as binary operations between two vectors, this involves pattern matching on splatted shift operands. For v2i64 shifts any i32 shift operands have to be zero extended in the input and any i64 shift operands have to be wrapped in the output. Depends on D52007. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51906 llvm-svn: 342302
2018-09-15 08:45:31 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f64x2.ne # encoding: [0xfd,0x47]
f64x2.ne
[WebAssembly] SIMD shifts Summary: Implement shifts of vectors by i32. Since LLVM defines shifts as binary operations between two vectors, this involves pattern matching on splatted shift operands. For v2i64 shifts any i32 shift operands have to be zero extended in the input and any i64 shift operands have to be wrapped in the output. Depends on D52007. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51906 llvm-svn: 342302
2018-09-15 08:45:31 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f64x2.lt # encoding: [0xfd,0x48]
f64x2.lt
[WebAssembly] SIMD shifts Summary: Implement shifts of vectors by i32. Since LLVM defines shifts as binary operations between two vectors, this involves pattern matching on splatted shift operands. For v2i64 shifts any i32 shift operands have to be zero extended in the input and any i64 shift operands have to be wrapped in the output. Depends on D52007. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51906 llvm-svn: 342302
2018-09-15 08:45:31 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f64x2.gt # encoding: [0xfd,0x49]
f64x2.gt
[WebAssembly] SIMD shifts Summary: Implement shifts of vectors by i32. Since LLVM defines shifts as binary operations between two vectors, this involves pattern matching on splatted shift operands. For v2i64 shifts any i32 shift operands have to be zero extended in the input and any i64 shift operands have to be wrapped in the output. Depends on D52007. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51906 llvm-svn: 342302
2018-09-15 08:45:31 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f64x2.le # encoding: [0xfd,0x4a]
f64x2.le
# CHECK: f64x2.ge # encoding: [0xfd,0x4b]
f64x2.ge
[WebAssembly] SIMD shifts Summary: Implement shifts of vectors by i32. Since LLVM defines shifts as binary operations between two vectors, this involves pattern matching on splatted shift operands. For v2i64 shifts any i32 shift operands have to be zero extended in the input and any i64 shift operands have to be wrapped in the output. Depends on D52007. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51906 llvm-svn: 342302
2018-09-15 08:45:31 +08:00
[WebAssembly] Renumber SIMD bitwise instructions Summary: Changed to match https://github.com/WebAssembly/simd/pull/54. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54561 llvm-svn: 346931
2018-11-15 11:38:59 +08:00
# CHECK: v128.not # encoding: [0xfd,0x4c]
v128.not
# CHECK: v128.and # encoding: [0xfd,0x4d]
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
v128.and
[WebAssembly] Renumber SIMD bitwise instructions Summary: Changed to match https://github.com/WebAssembly/simd/pull/54. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54561 llvm-svn: 346931
2018-11-15 11:38:59 +08:00
# CHECK: v128.or # encoding: [0xfd,0x4e]
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
v128.or
[WebAssembly] Renumber SIMD bitwise instructions Summary: Changed to match https://github.com/WebAssembly/simd/pull/54. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54561 llvm-svn: 346931
2018-11-15 11:38:59 +08:00
# CHECK: v128.xor # encoding: [0xfd,0x4f]
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
v128.xor
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: v128.bitselect # encoding: [0xfd,0x50]
[WebAssembly] Bitselect intrinsic and instruction Summary: Depends on D52755. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52805 llvm-svn: 343739
2018-10-04 07:02:23 +08:00
v128.bitselect
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.neg # encoding: [0xfd,0x51]
i8x16.neg
[WebAssembly] any_true and all_true intrinsics and instructions Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52755 llvm-svn: 343649
2018-10-03 08:19:39 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.any_true # encoding: [0xfd,0x52]
i8x16.any_true
[WebAssembly] any_true and all_true intrinsics and instructions Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52755 llvm-svn: 343649
2018-10-03 08:19:39 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.all_true # encoding: [0xfd,0x53]
[WebAssembly] any_true and all_true intrinsics and instructions Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52755 llvm-svn: 343649
2018-10-03 08:19:39 +08:00
i8x16.all_true
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.shl # encoding: [0xfd,0x54]
i8x16.shl
[WebAssembly] any_true and all_true intrinsics and instructions Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52755 llvm-svn: 343649
2018-10-03 08:19:39 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.shr_s # encoding: [0xfd,0x55]
i8x16.shr_s
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.shr_u # encoding: [0xfd,0x56]
i8x16.shr_u
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.add # encoding: [0xfd,0x57]
i8x16.add
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.add_saturate_s # encoding: [0xfd,0x58]
i8x16.add_saturate_s
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.add_saturate_u # encoding: [0xfd,0x59]
i8x16.add_saturate_u
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.sub # encoding: [0xfd,0x5a]
i8x16.sub
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.sub_saturate_s # encoding: [0xfd,0x5b]
i8x16.sub_saturate_s
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.sub_saturate_u # encoding: [0xfd,0x5c]
i8x16.sub_saturate_u
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i8x16.mul # encoding: [0xfd,0x5d]
i8x16.mul
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.neg # encoding: [0xfd,0x62]
i16x8.neg
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.any_true # encoding: [0xfd,0x63]
i16x8.any_true
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.all_true # encoding: [0xfd,0x64]
i16x8.all_true
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.shl # encoding: [0xfd,0x65]
i16x8.shl
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.shr_s # encoding: [0xfd,0x66]
i16x8.shr_s
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.shr_u # encoding: [0xfd,0x67]
i16x8.shr_u
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.add # encoding: [0xfd,0x68]
i16x8.add
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.add_saturate_s # encoding: [0xfd,0x69]
i16x8.add_saturate_s
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.add_saturate_u # encoding: [0xfd,0x6a]
i16x8.add_saturate_u
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.sub # encoding: [0xfd,0x6b]
i16x8.sub
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.sub_saturate_s # encoding: [0xfd,0x6c]
i16x8.sub_saturate_s
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.sub_saturate_u # encoding: [0xfd,0x6d]
i16x8.sub_saturate_u
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i16x8.mul # encoding: [0xfd,0x6e]
i16x8.mul
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i32x4.neg # encoding: [0xfd,0x73]
i32x4.neg
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i32x4.any_true # encoding: [0xfd,0x74]
i32x4.any_true
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i32x4.all_true # encoding: [0xfd,0x75]
i32x4.all_true
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i32x4.shl # encoding: [0xfd,0x76]
i32x4.shl
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i32x4.shr_s # encoding: [0xfd,0x77]
i32x4.shr_s
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i32x4.shr_u # encoding: [0xfd,0x78]
i32x4.shr_u
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i32x4.add # encoding: [0xfd,0x79]
i32x4.add
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i32x4.sub # encoding: [0xfd,0x7c]
i32x4.sub
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i32x4.mul # encoding: [0xfd,0x7f]
i32x4.mul
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i64x2.neg # encoding: [0xfd,0x84,0x01]
i64x2.neg
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i64x2.any_true # encoding: [0xfd,0x85,0x01]
i64x2.any_true
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i64x2.all_true # encoding: [0xfd,0x86,0x01]
i64x2.all_true
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i64x2.shl # encoding: [0xfd,0x87,0x01]
i64x2.shl
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i64x2.shr_s # encoding: [0xfd,0x88,0x01]
i64x2.shr_s
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i64x2.shr_u # encoding: [0xfd,0x89,0x01]
i64x2.shr_u
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i64x2.add # encoding: [0xfd,0x8a,0x01]
i64x2.add
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: i64x2.sub # encoding: [0xfd,0x8d,0x01]
i64x2.sub
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f32x4.abs # encoding: [0xfd,0x95,0x01]
f32x4.abs
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f32x4.neg # encoding: [0xfd,0x96,0x01]
f32x4.neg
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f32x4.sqrt # encoding: [0xfd,0x97,0x01]
f32x4.sqrt
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Add SIMD QFMA/QFMS Summary: Adds clang builtins and LLVM intrinsics for these experimental instructions. They are not implemented in engines yet, but that is ok because the user must opt into using them by calling the builtins. Reviewers: aheejin, dschuff Reviewed By: aheejin Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D67020 llvm-svn: 370556
2019-08-31 08:12:29 +08:00
# CHECK: f32x4.qfma # encoding: [0xfd,0x98,0x01]
f32x4.qfma
# CHECK: f32x4.qfms # encoding: [0xfd,0x99,0x01]
f32x4.qfms
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f32x4.add # encoding: [0xfd,0x9a,0x01]
f32x4.add
[WebAssembly] SIMD neg Summary: Depends on D52007. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52009 llvm-svn: 342296
2018-09-15 06:35:12 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f32x4.sub # encoding: [0xfd,0x9b,0x01]
f32x4.sub
[WebAssembly] SIMD neg Summary: Depends on D52007. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52009 llvm-svn: 342296
2018-09-15 06:35:12 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f32x4.mul # encoding: [0xfd,0x9c,0x01]
f32x4.mul
[WebAssembly] v4f32.abs and v2f64.abs Summary: implement lowering of @llvm.fabs for vector types. Reviewers: aheejin, dschuff Subscribers: llvm-svn: 342513
2018-09-19 05:45:12 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f32x4.div # encoding: [0xfd,0x9d,0x01]
f32x4.div
[WebAssembly] v4f32.abs and v2f64.abs Summary: implement lowering of @llvm.fabs for vector types. Reviewers: aheejin, dschuff Subscribers: llvm-svn: 342513
2018-09-19 05:45:12 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f32x4.min # encoding: [0xfd,0x9e,0x01]
[WebAssembly] SIMD min and max Summary: Depends on D52324 and D52764. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52325 llvm-svn: 344438
2018-10-13 15:26:10 +08:00
f32x4.min
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f32x4.max # encoding: [0xfd,0x9f,0x01]
[WebAssembly] SIMD min and max Summary: Depends on D52324 and D52764. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52325 llvm-svn: 344438
2018-10-13 15:26:10 +08:00
f32x4.max
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f64x2.abs # encoding: [0xfd,0xa0,0x01]
f64x2.abs
[WebAssembly] SIMD min and max Summary: Depends on D52324 and D52764. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52325 llvm-svn: 344438
2018-10-13 15:26:10 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f64x2.neg # encoding: [0xfd,0xa1,0x01]
f64x2.neg
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f64x2.sqrt # encoding: [0xfd,0xa2,0x01]
f64x2.sqrt
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Add SIMD QFMA/QFMS Summary: Adds clang builtins and LLVM intrinsics for these experimental instructions. They are not implemented in engines yet, but that is ok because the user must opt into using them by calling the builtins. Reviewers: aheejin, dschuff Reviewed By: aheejin Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D67020 llvm-svn: 370556
2019-08-31 08:12:29 +08:00
# CHECK: f64x2.qfma # encoding: [0xfd,0xa3,0x01]
f64x2.qfma
# CHECK: f64x2.qfms # encoding: [0xfd,0xa4,0x01]
f64x2.qfms
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f64x2.add # encoding: [0xfd,0xa5,0x01]
f64x2.add
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f64x2.sub # encoding: [0xfd,0xa6,0x01]
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
f64x2.sub
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f64x2.mul # encoding: [0xfd,0xa7,0x01]
f64x2.mul
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f64x2.div # encoding: [0xfd,0xa8,0x01]
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
f64x2.div
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f64x2.min # encoding: [0xfd,0xa9,0x01]
f64x2.min
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
# CHECK: f64x2.max # encoding: [0xfd,0xaa,0x01]
f64x2.max
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
[WebAssembly] Massive instruction renaming Summary: An automated renaming of all the instructions listed at https://github.com/WebAssembly/spec/issues/884#issuecomment-426433329 as well as some similarly-named identifiers. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, eraman, sunfish, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D56338 llvm-svn: 350609
2019-01-08 14:25:55 +08:00
# CHECK: i32x4.trunc_sat_f32x4_s # encoding: [0xfd,0xab,0x01]
i32x4.trunc_sat_f32x4_s
[WebAssembly] SIMD sqrt Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52387 llvm-svn: 342937
2018-09-25 11:39:28 +08:00
[WebAssembly] Massive instruction renaming Summary: An automated renaming of all the instructions listed at https://github.com/WebAssembly/spec/issues/884#issuecomment-426433329 as well as some similarly-named identifiers. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, eraman, sunfish, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D56338 llvm-svn: 350609
2019-01-08 14:25:55 +08:00
# CHECK: i32x4.trunc_sat_f32x4_u # encoding: [0xfd,0xac,0x01]
i32x4.trunc_sat_f32x4_u
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
[WebAssembly] Massive instruction renaming Summary: An automated renaming of all the instructions listed at https://github.com/WebAssembly/spec/issues/884#issuecomment-426433329 as well as some similarly-named identifiers. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, eraman, sunfish, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D56338 llvm-svn: 350609
2019-01-08 14:25:55 +08:00
# CHECK: i64x2.trunc_sat_f64x2_s # encoding: [0xfd,0xad,0x01]
i64x2.trunc_sat_f64x2_s
[WebAssembly] Renumber and LEB128-encode SIMD opcodes Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54126 llvm-svn: 346463
2018-11-09 09:45:56 +08:00
[WebAssembly] Massive instruction renaming Summary: An automated renaming of all the instructions listed at https://github.com/WebAssembly/spec/issues/884#issuecomment-426433329 as well as some similarly-named identifiers. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, eraman, sunfish, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D56338 llvm-svn: 350609
2019-01-08 14:25:55 +08:00
# CHECK: i64x2.trunc_sat_f64x2_u # encoding: [0xfd,0xae,0x01]
i64x2.trunc_sat_f64x2_u
[WebAssembly] SIMD sqrt Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52387 llvm-svn: 342937
2018-09-25 11:39:28 +08:00
[WebAssembly] Massive instruction renaming Summary: An automated renaming of all the instructions listed at https://github.com/WebAssembly/spec/issues/884#issuecomment-426433329 as well as some similarly-named identifiers. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, eraman, sunfish, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D56338 llvm-svn: 350609
2019-01-08 14:25:55 +08:00
# CHECK: f32x4.convert_i32x4_s # encoding: [0xfd,0xaf,0x01]
f32x4.convert_i32x4_s
[WebAssembly] SIMD conversions Summary: Lowers (s|u)itofp and fpto(s|u)i instructions for vectors. The fp to int conversions produce poison values if their arguments are out of the convertible range, so a future CL will have to add an LLVM intrinsic to make the saturating behavior of this conversion usable. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52372 llvm-svn: 343052
2018-09-26 08:34:36 +08:00
[WebAssembly] Massive instruction renaming Summary: An automated renaming of all the instructions listed at https://github.com/WebAssembly/spec/issues/884#issuecomment-426433329 as well as some similarly-named identifiers. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, eraman, sunfish, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D56338 llvm-svn: 350609
2019-01-08 14:25:55 +08:00
# CHECK: f32x4.convert_i32x4_u # encoding: [0xfd,0xb0,0x01]
f32x4.convert_i32x4_u
[WebAssembly] SIMD conversions Summary: Lowers (s|u)itofp and fpto(s|u)i instructions for vectors. The fp to int conversions produce poison values if their arguments are out of the convertible range, so a future CL will have to add an LLVM intrinsic to make the saturating behavior of this conversion usable. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52372 llvm-svn: 343052
2018-09-26 08:34:36 +08:00
[WebAssembly] Massive instruction renaming Summary: An automated renaming of all the instructions listed at https://github.com/WebAssembly/spec/issues/884#issuecomment-426433329 as well as some similarly-named identifiers. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, eraman, sunfish, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D56338 llvm-svn: 350609
2019-01-08 14:25:55 +08:00
# CHECK: f64x2.convert_i64x2_s # encoding: [0xfd,0xb1,0x01]
f64x2.convert_i64x2_s
[WebAssembly] SIMD conversions Summary: Lowers (s|u)itofp and fpto(s|u)i instructions for vectors. The fp to int conversions produce poison values if their arguments are out of the convertible range, so a future CL will have to add an LLVM intrinsic to make the saturating behavior of this conversion usable. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52372 llvm-svn: 343052
2018-09-26 08:34:36 +08:00
[WebAssembly] Massive instruction renaming Summary: An automated renaming of all the instructions listed at https://github.com/WebAssembly/spec/issues/884#issuecomment-426433329 as well as some similarly-named identifiers. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, eraman, sunfish, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D56338 llvm-svn: 350609
2019-01-08 14:25:55 +08:00
# CHECK: f64x2.convert_i64x2_u # encoding: [0xfd,0xb2,0x01]
f64x2.convert_i64x2_u
[WebAssembly] SIMD conversions Summary: Lowers (s|u)itofp and fpto(s|u)i instructions for vectors. The fp to int conversions produce poison values if their arguments are out of the convertible range, so a future CL will have to add an LLVM intrinsic to make the saturating behavior of this conversion usable. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52372 llvm-svn: 343052
2018-09-26 08:34:36 +08:00
[WebAssembly] vNxM.load_splat instructions Summary: Adds the new load_splat instructions as specified at https://github.com/WebAssembly/simd/blob/master/proposals/simd/SIMD.md#load-and-splat. DAGISel does not allow matching multiple copies of the same load in a single pattern, so we use a new node in WebAssemblyISD to wrap loads that should be splatted. Depends on D67783. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67784 llvm-svn: 372655
2019-09-24 04:42:12 +08:00
# CHECK: v8x16.load_splat 48 # encoding: [0xfd,0xc2,0x01,0x00,0x30]
v8x16.load_splat 48
# CHECK: v16x8.load_splat 48 # encoding: [0xfd,0xc3,0x01,0x01,0x30]
v16x8.load_splat 48
# CHECK: v32x4.load_splat 48 # encoding: [0xfd,0xc4,0x01,0x02,0x30]
v32x4.load_splat 48
# CHECK: v64x2.load_splat 48 # encoding: [0xfd,0xc5,0x01,0x03,0x30]
v64x2.load_splat 48
[WebAssembly] Narrowing and widening SIMD ops Summary: Implements target-specific LLVM intrinsics and clang builtins for these new SIMD operations, as described at https://github.com/WebAssembly/simd/blob/master/proposals/simd/SIMD.md#integer-to-integer-narrowing. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D67425 llvm-svn: 371906
2019-09-14 06:54:41 +08:00
# CHECK: i8x16.narrow_i16x8_s # encoding: [0xfd,0xc6,0x01]
i8x16.narrow_i16x8_s
# CHECK: i8x16.narrow_i16x8_u # encoding: [0xfd,0xc7,0x01]
i8x16.narrow_i16x8_u
# CHECK: i16x8.narrow_i32x4_s # encoding: [0xfd,0xc8,0x01]
i16x8.narrow_i32x4_s
# CHECK: i16x8.narrow_i32x4_u # encoding: [0xfd,0xc9,0x01]
i16x8.narrow_i32x4_u
# CHECK: i16x8.widen_low_i8x16_s # encoding: [0xfd,0xca,0x01]
i16x8.widen_low_i8x16_s
# CHECK: i16x8.widen_high_i8x16_s # encoding: [0xfd,0xcb,0x01]
i16x8.widen_high_i8x16_s
# CHECK: i16x8.widen_low_i8x16_u # encoding: [0xfd,0xcc,0x01]
i16x8.widen_low_i8x16_u
# CHECK: i16x8.widen_high_i8x16_u # encoding: [0xfd,0xcd,0x01]
i16x8.widen_high_i8x16_u
# CHECK: i32x4.widen_low_i16x8_s # encoding: [0xfd,0xce,0x01]
i32x4.widen_low_i16x8_s
# CHECK: i32x4.widen_high_i16x8_s # encoding: [0xfd,0xcf,0x01]
i32x4.widen_high_i16x8_s
# CHECK: i32x4.widen_low_i16x8_u # encoding: [0xfd,0xd0,0x01]
i32x4.widen_low_i16x8_u
# CHECK: i32x4.widen_high_i16x8_u # encoding: [0xfd,0xd1,0x01]
i32x4.widen_high_i16x8_u
[WebAssembly] SIMD Load and extend operations Summary: As specified at https://github.com/webassembly/simd/blob/master/proposals/simd/SIMD.md#load-and-extend. These instructions are behind the unimplemented-simd128 target feature for now because they have not been implemented in V8 yet. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68058 llvm-svn: 373040
2019-09-27 10:06:50 +08:00
# CHECK: i16x8.load8x8_s 32 # encoding: [0xfd,0xd2,0x01,0x03,0x20]
i16x8.load8x8_s 32
# CHECK: i16x8.load8x8_u 32 # encoding: [0xfd,0xd3,0x01,0x03,0x20]
i16x8.load8x8_u 32
# CHECK: i32x4.load16x4_s 32 # encoding: [0xfd,0xd4,0x01,0x03,0x20]
i32x4.load16x4_s 32
# CHECK: i32x4.load16x4_u 32 # encoding: [0xfd,0xd5,0x01,0x03,0x20]
i32x4.load16x4_u 32
# CHECK: i64x2.load32x2_s 32 # encoding: [0xfd,0xd6,0x01,0x03,0x20]
i64x2.load32x2_s 32
# CHECK: i64x2.load32x2_u 32 # encoding: [0xfd,0xd7,0x01,0x03,0x20]
i64x2.load32x2_u 32
[WebAssembly] v128.andnot Summary: As specified at https://github.com/WebAssembly/simd/blob/master/proposals/simd/SIMD.md#bitwise-and-not Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68113 llvm-svn: 373041
2019-09-27 10:11:40 +08:00
# CHECK: v128.andnot # encoding: [0xfd,0xd8,0x01]
v128.andnot
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
2018-09-15 05:21:42 +08:00
end_function