11 Commits

Author	SHA1	Message	Date
Thomas Parnell	9a7e2d0534	[Bugfix] Allow vllm to still work if triton is not installed. (#6786) ... Signed-off-by: Thomas Parnell <tpa@zurich.ibm.com>	2024-07-29 14:51:27 -07:00
Li, Jiang	3bbb4936dc	[Hardware] [Intel] Enable Multiprocessing and tensor parallel in CPU backend and update documentation (#6125)	2024-07-26 13:50:10 -07:00
Chip Kerchner	38a1674abb	Support CPU inference with VSX PowerPC ISA (#5652)	2024-06-26 21:53:04 +00:00
Isotr0py	edd5fe5fa2	[Bugfix] Add phi3v resize for dynamic shape and fix torchvision requirement (#5772)	2024-06-24 12:11:53 +08:00
Li, Jiang	80aa7e91fc	[Hardware][Intel] Optimize CPU backend and add more performance tips (#4971) ... Co-authored-by: Jianan Gu <jianan.gu@intel.com>	2024-06-13 09:33:14 -07:00
Michael Goin	d627a3d837	[Misc] Upgrade to `torch==2.3.0` (#4454)	2024-04-29 20:05:47 -04:00
Roy	8db1bf32f8	[Misc] Upgrade triton to 2.2.0 (#4061)	2024-04-14 17:43:54 -07:00
Sanger Steel	711a000255	[Frontend] [Core] feat: Add model loading using `tensorizer` (#3476)	2024-04-13 17:13:01 -07:00
Woosuk Kwon	cfaf49a167	[Misc] Define common requirements (#3841)	2024-04-05 00:39:17 -07:00
Michael Goin	db2a6a41e2	[Hardware][CPU] Update cpu torch to match default of 2.2.1 (#3854)	2024-04-04 19:49:49 +00:00
bigPYJ1151	0e3f06fe9c	[Hardware][Intel] Add CPU inference backend (#3634) ... Co-authored-by: Kunshang Ji <kunshang.ji@intel.com> Co-authored-by: Yuan Zhou <yuan.zhou@intel.com>	2024-04-01 22:07:30 -07:00