forked from XS-MLVP/env-xs-ov-00-bpu
fix: modified bit width in array_8_ext and array_0_0_ext
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@ -469,13 +469,13 @@ module array_0_0_ext(
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input [6:0] RW0_addr,
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input RW0_en,
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input RW0_wmode,
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input [49:0] RW0_wdata,
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output [49:0] RW0_rdata
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input [52:0] RW0_wdata,
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output [52:0] RW0_rdata
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);
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reg reg_RW0_ren;
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reg [6:0] reg_RW0_addr;
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reg [49:0] ram [127:0];
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reg [52:0] ram [127:0];
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`ifdef RANDOMIZE_MEM_INIT
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integer initvar;
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initial begin
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@ -493,7 +493,7 @@ module array_0_0_ext(
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always @(posedge RW0_clk)
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if (RW0_en && RW0_wmode) begin
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for(i=0;i<1;i=i+1) begin
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ram[RW0_addr][i*50 +: 50] <= RW0_wdata[i*50 +: 50];
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ram[RW0_addr][i*53 +: 53] <= RW0_wdata[i*53 +: 53];
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end
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end
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`ifdef RANDOMIZE_GARBAGE_ASSIGN
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@ -506,7 +506,7 @@ module array_0_0_ext(
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end
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`endif
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always @(posedge RW0_clk) RW0_random <= {$random, $random};
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assign RW0_rdata = reg_RW0_ren ? ram[reg_RW0_addr] : RW0_random[49:0];
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assign RW0_rdata = reg_RW0_ren ? ram[reg_RW0_addr] : RW0_random[52:0];
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`else
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assign RW0_rdata = ram[reg_RW0_addr];
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`endif
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@ -518,13 +518,13 @@ module array_8_ext(
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input RW0_en,
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input RW0_wmode,
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input [1:0] RW0_wmask,
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input [99:0] RW0_wdata,
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output [99:0] RW0_rdata
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input [105:0] RW0_wdata,
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output [105:0] RW0_rdata
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);
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reg reg_RW0_ren;
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reg [6:0] reg_RW0_addr;
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reg [99:0] ram [127:0];
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reg [105:0] ram [127:0];
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`ifdef RANDOMIZE_MEM_INIT
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integer initvar;
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initial begin
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@ -543,7 +543,7 @@ module array_8_ext(
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if (RW0_en && RW0_wmode) begin
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for(i=0;i<2;i=i+1) begin
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if(RW0_wmask[i]) begin
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ram[RW0_addr][i*50 +: 50] <= RW0_wdata[i*50 +: 50];
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ram[RW0_addr][i*53 +: 53] <= RW0_wdata[i*53 +: 53];
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end
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end
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end
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@ -557,7 +557,7 @@ module array_8_ext(
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end
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`endif
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always @(posedge RW0_clk) RW0_random <= {$random, $random, $random, $random};
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assign RW0_rdata = reg_RW0_ren ? ram[reg_RW0_addr] : RW0_random[99:0];
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assign RW0_rdata = reg_RW0_ren ? ram[reg_RW0_addr] : RW0_random[105:0];
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`else
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assign RW0_rdata = ram[reg_RW0_addr];
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`endif
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