add drive for useless signal

This commit is contained in:
llyyqq 2024-09-15 12:13:50 +08:00
parent 8c70bfc8cb
commit 608098f931
1 changed files with 132 additions and 0 deletions

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@ -218,6 +218,135 @@ class LastStageMeta:
print(f' altDiffers={self.resp_meta_altDiffers}')
def init_s2_useless_port(ittage: DUTITTage):
ittage.io_in_bits_resp_in_0_s2_full_pred_0_br_taken_mask_1.value = 0
ittage.io_in_bits_resp_in_0_s2_full_pred_1_br_taken_mask_0.value = 0
ittage.io_in_bits_resp_in_0_s2_full_pred_1_br_taken_mask_1.value = 0
ittage.io_in_bits_resp_in_0_s2_full_pred_2_br_taken_mask_0.value = 0
ittage.io_in_bits_resp_in_0_s2_full_pred_2_br_taken_mask_1.value = 0
ittage.io_in_bits_resp_in_0_s2_full_pred_3_br_taken_mask_0.value = 0
ittage.io_in_bits_resp_in_0_s2_full_pred_3_br_taken_mask_1.value = 0
ittage.io_in_bits_resp_in_0_s2_full_pred_1_slot_valids_0.value = 1
ittage.io_in_bits_resp_in_0_s2_full_pred_1_slot_valids_1.value = 1
ittage.io_in_bits_resp_in_0_s2_full_pred_0_slot_valids_0.value = 1
ittage.io_in_bits_resp_in_0_s2_full_pred_0_slot_valids_1.value = 1
ittage.io_in_bits_resp_in_0_s2_full_pred_2_slot_valids_0.value = 1
ittage.io_in_bits_resp_in_0_s2_full_pred_2_slot_valids_1.value = 1
ittage.io_in_bits_resp_in_0_s2_full_pred_3_slot_valids_0.value = 1
ittage.io_in_bits_resp_in_0_s2_full_pred_3_slot_valids_1.value = 1
ittage.io_in_bits_resp_in_0_s2_full_pred_0_targets_0.value = 0x11223344
ittage.io_in_bits_resp_in_0_s2_full_pred_0_targets_1.value = 0x11223344
ittage.io_in_bits_resp_in_0_s2_full_pred_1_targets_0.value = 0x11223344
ittage.io_in_bits_resp_in_0_s2_full_pred_1_targets_1.value = 0x11223344
ittage.io_in_bits_resp_in_0_s2_full_pred_2_targets_0.value = 0x11223344
ittage.io_in_bits_resp_in_0_s2_full_pred_2_targets_1.value = 0x11223344
ittage.io_in_bits_resp_in_0_s2_full_pred_3_targets_0.value = 0x11223344
ittage.io_in_bits_resp_in_0_s2_full_pred_3_targets_1.value = 0x11223344
ittage.io_in_bits_resp_in_0_s2_full_pred_0_jalr_target.value = 0xdeadbeef
ittage.io_in_bits_resp_in_0_s2_full_pred_1_jalr_target.value = 0xdeadbeef
ittage.io_in_bits_resp_in_0_s2_full_pred_2_jalr_target.value = 0xdeadbeef
ittage.io_in_bits_resp_in_0_s2_full_pred_3_jalr_target.value = 0xdeadbeef
ittage.io_in_bits_resp_in_0_s2_full_pred_0_offsets_0.value = 2
ittage.io_in_bits_resp_in_0_s2_full_pred_0_offsets_1.value = 2
ittage.io_in_bits_resp_in_0_s2_full_pred_1_offsets_0.value = 2
ittage.io_in_bits_resp_in_0_s2_full_pred_1_offsets_1.value = 2
ittage.io_in_bits_resp_in_0_s2_full_pred_2_offsets_0.value = 2
ittage.io_in_bits_resp_in_0_s2_full_pred_2_offsets_1.value = 2
ittage.io_in_bits_resp_in_0_s2_full_pred_3_offsets_0.value = 2
ittage.io_in_bits_resp_in_0_s2_full_pred_3_offsets_1.value = 2
ittage.io_in_bits_resp_in_0_s2_full_pred_0_fallThroughAddr.value = 0xbeefdead
ittage.io_in_bits_resp_in_0_s2_full_pred_1_fallThroughAddr.value = 0xbeefdead
ittage.io_in_bits_resp_in_0_s2_full_pred_2_fallThroughAddr.value = 0xbeefdead
ittage.io_in_bits_resp_in_0_s2_full_pred_3_fallThroughAddr.value = 0xbeefdead
ittage.io_in_bits_resp_in_0_s2_full_pred_3_fallThroughErr.value = 0
ittage.io_in_bits_resp_in_0_s2_full_pred_2_is_jalr.value = 1
ittage.io_in_bits_resp_in_0_s2_full_pred_2_is_call.value = 0
ittage.io_in_bits_resp_in_0_s2_full_pred_2_is_ret.value = 0
ittage.io_in_bits_resp_in_0_s2_full_pred_2_last_may_be_rvi_call.value = 0
ittage.io_in_bits_resp_in_0_s2_full_pred_0_is_br_sharing.value = 0
ittage.io_in_bits_resp_in_0_s2_full_pred_1_is_br_sharing.value = 0
ittage.io_in_bits_resp_in_0_s2_full_pred_2_is_br_sharing.value = 0
ittage.io_in_bits_resp_in_0_s2_full_pred_3_is_br_sharing.value = 0
ittage.io_in_bits_resp_in_0_s2_full_pred_0_hit.value = 0
ittage.io_in_bits_resp_in_0_s2_full_pred_1_hit.value = 0
ittage.io_in_bits_resp_in_0_s2_full_pred_2_hit.value = 0
ittage.io_in_bits_resp_in_0_s2_full_pred_3_hit.value = 0
def init_s3_useless_port(ittage: DUTITTage):
ittage.io_in_bits_resp_in_0_s3_full_pred_0_br_taken_mask_0.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_0_br_taken_mask_1.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_1_br_taken_mask_0.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_1_br_taken_mask_1.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_2_br_taken_mask_0.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_2_br_taken_mask_1.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_3_br_taken_mask_0.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_3_br_taken_mask_1.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_0_slot_valids_0.value = 1
ittage.io_in_bits_resp_in_0_s3_full_pred_0_slot_valids_1.value = 1
ittage.io_in_bits_resp_in_0_s3_full_pred_1_slot_valids_0.value = 1
ittage.io_in_bits_resp_in_0_s3_full_pred_1_slot_valids_1.value = 1
ittage.io_in_bits_resp_in_0_s3_full_pred_2_slot_valids_0.value = 1
ittage.io_in_bits_resp_in_0_s3_full_pred_2_slot_valids_1.value = 1
ittage.io_in_bits_resp_in_0_s3_full_pred_3_slot_valids_0.value = 1
ittage.io_in_bits_resp_in_0_s3_full_pred_3_slot_valids_1.value = 1
ittage.io_in_bits_resp_in_0_s3_full_pred_0_targets_0.value = 0x11223344
ittage.io_in_bits_resp_in_0_s3_full_pred_0_targets_1.value = 0x11223344
ittage.io_in_bits_resp_in_0_s3_full_pred_1_targets_0.value = 0x11223344
ittage.io_in_bits_resp_in_0_s3_full_pred_1_targets_1.value = 0x11223344
ittage.io_in_bits_resp_in_0_s3_full_pred_2_targets_0.value = 0x11223344
ittage.io_in_bits_resp_in_0_s3_full_pred_2_targets_1.value = 0x11223344
ittage.io_in_bits_resp_in_0_s3_full_pred_3_targets_0.value = 0x11223344
ittage.io_in_bits_resp_in_0_s3_full_pred_3_targets_1.value = 0x11223344
ittage.io_in_bits_resp_in_0_s3_full_pred_0_jalr_target.value = 0xdeadbeef
ittage.io_in_bits_resp_in_0_s3_full_pred_1_jalr_target.value = 0xdeadbeef
ittage.io_in_bits_resp_in_0_s3_full_pred_2_jalr_target.value = 0xdeadbeef
ittage.io_in_bits_resp_in_0_s3_full_pred_3_jalr_target.value = 0xdeadbeef
ittage.io_in_bits_resp_in_0_s3_full_pred_3_offsets_0.value = 2
ittage.io_in_bits_resp_in_0_s3_full_pred_3_offsets_1.value = 2
ittage.io_in_bits_resp_in_0_s3_full_pred_0_fallThroughAddr.value = 0xbeefdead
ittage.io_in_bits_resp_in_0_s3_full_pred_1_fallThroughAddr.value = 0xbeefdead
ittage.io_in_bits_resp_in_0_s3_full_pred_2_fallThroughAddr.value = 0xbeefdead
ittage.io_in_bits_resp_in_0_s3_full_pred_3_fallThroughAddr.value = 0xbeefdead
ittage.io_in_bits_resp_in_0_s3_full_pred_0_fallThroughErr.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_1_fallThroughErr.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_2_fallThroughErr.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_3_fallThroughErr.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_2_is_jalr.value = 1
ittage.io_in_bits_resp_in_0_s3_full_pred_2_is_call.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_2_is_ret.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_0_is_br_sharing.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_1_is_br_sharing.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_2_is_br_sharing.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_3_is_br_sharing.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_0_hit.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_1_hit.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_2_hit.value = 0
ittage.io_in_bits_resp_in_0_s3_full_pred_3_hit.value = 0
def init_ftb_entry_useless_port(ittage: DUTITTage):
ittage.io_in_bits_resp_in_0_last_stage_ftb_entry_always_taken_0.value = 0
ittage.io_in_bits_resp_in_0_last_stage_ftb_entry_always_taken_1.value = 0
ittage.io_in_bits_resp_in_0_last_stage_ftb_entry_brSlots_0_lower.value = 0x3
ittage.io_in_bits_resp_in_0_last_stage_ftb_entry_brSlots_0_offset.value = 0x4
ittage.io_in_bits_resp_in_0_last_stage_ftb_entry_brSlots_0_sharing.value = 0
ittage.io_in_bits_resp_in_0_last_stage_ftb_entry_brSlots_0_tarStat.value = 0
ittage.io_in_bits_resp_in_0_last_stage_ftb_entry_brSlots_0_valid.value = 0
ittage.io_in_bits_resp_in_0_last_stage_ftb_entry_carry.value = 0
ittage.io_in_bits_resp_in_0_last_stage_ftb_entry_isCall.value = 0
ittage.io_in_bits_resp_in_0_last_stage_ftb_entry_isJalr.value = 1
ittage.io_in_bits_resp_in_0_last_stage_ftb_entry_isRet.value = 0
ittage.io_in_bits_resp_in_0_last_stage_ftb_entry_last_may_be_rvi_call.value = 0
ittage.io_in_bits_resp_in_0_last_stage_ftb_entry_pftAddr.value = 0
ittage.io_in_bits_resp_in_0_last_stage_ftb_entry_tailSlot_lower.value = 0x5
ittage.io_in_bits_resp_in_0_last_stage_ftb_entry_tailSlot_offset.value = 0x6
ittage.io_in_bits_resp_in_0_last_stage_ftb_entry_tailSlot_sharing.value = 0
ittage.io_in_bits_resp_in_0_last_stage_ftb_entry_tailSlot_tarStat.value = 0
ittage.io_in_bits_resp_in_0_last_stage_ftb_entry_tailSlot_valid.value = 0
ittage.io_in_bits_resp_in_0_last_stage_ftb_entry_valid.value = 0
def reset_init(ittage: DUTITTage):
ittage.InitClock("clock")
ittage.io_update_valid.xdata.value = 0
@ -225,6 +354,9 @@ def reset_init(ittage: DUTITTage):
ittage.Step(100)
ittage.reset.xdata.value = 0
ittage.Step(512)
init_s2_useless_port(ittage)
init_s3_useless_port(ittage)
init_ftb_entry_useless_port(ittage)
print("ITTAGE initialized")