forked from XS-MLVP/env-xs-ov-00-bpu
add ittage top dut model drive API
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@ -25,6 +25,7 @@ class ITTAGETop:
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self.s3_fire = 0
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def _set_update_sig(self, update: ITTAGEInfo):
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update.update_valid = 1
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index = random.randint(0, 15)
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update.ftb_entry_tailslot_offset = index
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update.ftb_entry_tailslot_sharing = 0
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@ -40,6 +41,24 @@ class ITTAGETop:
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# TODO: check if alt should be provided
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pass
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def _assign_dut_input(self):
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self.dut.io_in_bits_s0_pc_3.value = self.pc
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self.dut.io_in_bits_folded_hist_3_hist_12_folded_hist = self.folded_hists[0]
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self.dut.io_in_bits_folded_hist_3_hist_14_folded_hist = self.folded_hists[1]
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self.dut.io_in_bits_folded_hist_3_hist_13_folded_hist = self.folded_hists[2][0]
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self.dut.io_in_bits_folded_hist_3_hist_4_folded_hist = self.folded_hists[2][1]
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self.dut.io_in_bits_folded_hist_3_hist_6_folded_hist = self.folded_hists[3][0]
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self.dut.io_in_bits_folded_hist_3_hist_2_folded_hist = self.folded_hists[3][1]
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self.dut.io_in_bits_folded_hist_3_hist_10_folded_hist = self.folded_hists[4][0]
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self.dut.io_in_bits_folded_hist_3_hist_3_folded_hist = self.folded_hists[4][1]
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self.dut.io_in_bits_resp_in_0_s2_full_pred_3_jalr_target.value = 0xbeefdead
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def _gen_dut_output(self) -> ITTAGEInfo:
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raise NotImplementedError
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def _assign_dut_update(self, update: ITTAGEInfo):
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raise NotImplementedError
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def run(self):
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# TODO: read trace file and generate ITTAGE input info
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_input_info = None
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@ -57,16 +76,26 @@ class ITTAGETop:
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self.ref.set_s2_fire(1)
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# Predicdtion output
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_out_info = self.ref.cycle(_input_info)
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_out_ref_info = self.ref.cycle(_input_info)
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# Prediction output in this cycle is traced
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# Generate prediction feedback to ITTAGE
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if _out_info.is_trace:
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self._check_mispred(_out_info)
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self._set_update_sig(_out_info)
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if _out_ref_info.is_trace:
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self._check_mispred(_out_ref_info)
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self._set_update_sig(_out_ref_info)
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# Raise update transaction
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assert(self.ref.update(_out_info))
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# drive dut input
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self._assign_dut_input()
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self.dut.io_s0_fire_3.value = 1
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self.dut.io_s1_fire_3.value = 1
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self.dut.io_s2_fire_3.value = 1
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_out_dut_info = self._gen_dut_output()
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# TODO: control update valid in ref and dut
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# Prediction feedback connected to dut update
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self._assign_dut_update(_out_dut_info)
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# Raise ref update transaction
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assert(self.ref.update(_out_ref_info))
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# TODO: drive dut
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# TODO: if current ref model output is traced, compare output of dut and ref
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raise NotImplementedError
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