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git-svn-id: svn://svn.icms.temple.edu/lammps-ro/trunk@15243 f3b2605a-c512-4ea7-a41b-209d697bcdaa
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#############################################################################
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# Benchmarks
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#
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# in.intel.lj - Atomic fluid (LJ Benchmark)
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# in.intel.rhodo - Protein (Rhodopsin Benchmark)
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# in.intel.lc - Liquid Crystal w/ Gay-Berne potential
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# in.intel.sw - Silicon benchmark with Stillinger-Weber
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# in.intel.tersoff - Silicon benchmark with Tersoff
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# in.intel.water - Coarse-grain water benchmark using Stillinger-Weber
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# in.intel.lj - Atomic fluid (LJ Benchmark)
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# in.intel.rhodo - Protein (Rhodopsin Benchmark)
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# in.intel.lc - Liquid Crystal w/ Gay-Berne potential
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# in.intel.sw - Silicon benchmark with Stillinger-Weber
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# in.intel.tersoff - Silicon benchmark with Tersoff
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# in.intel.water - Coarse-grain water benchmark using Stillinger-Weber
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#
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#############################################################################
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#############################################################################
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# Expected Timesteps/second on E5-2697v3 with turbo on and HT enabled
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# Expected Timesteps/second with turbo on and HT enabled, LAMMPS 18-Jun-2016
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#
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# in.intel.lj - 131.943
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# in.intel.rhodo - 8.661
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# in.intel.lc - 14.015
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# in.intel.sw - 103.53
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# in.intel.tersoff - 55.525
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# in.intel.water - 44.079
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# Xeon E5-2697v4 Xeon Phi 7250
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#
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# in.intel.lj - 162.764 179.148
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# in.intel.rhodo - 11.633 13.668
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# in.intel.lc - 19.136 24.863
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# in.intel.sw - 139.048 152.026
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# in.intel.tersoff - 82.663 92.985
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# in.intel.water - 59.838 85.704
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#
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#############################################################################
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#############################################################################
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# For Haswell and Broadwell architectures, depending on the compiler version,
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# For Haswell (Xeon v3) architectures, depending on the compiler version,
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# it may give better performance to compile for an AVX target (with -xAVX
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# compiler option) instead of -xHost or -xCORE-AVX2 for some of the
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# workloads due to inefficient code generation for gathers. Aside from
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# Tersoff, this will not significantly impact performance because FMA
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# sensitive routines will still use AVX2 (MKL and SVML detect the processor
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# at runtime)
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# workloads. In most cases, FMA sensitive routines will still use AVX2
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# (MKL and SVML detect the processor at runtime). For Broadwell (Xeon v4)
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# architectures, -xCORE-AVX2 or -xHost will work best for all.
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#############################################################################
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#############################################################################
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@ -86,3 +87,8 @@ mpirun -np $LMP_CORES $LMP_BIN -in $bench -log none -pk intel 0 -sf intel
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# To run with USER-INTEL and automatic load balancing to 1 coprocessor
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#############################################################################
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mpirun -np $LMP_CORES $LMP_BIN -in $bench -log none -pk intel 1 -sf intel
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#############################################################################
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# If using PPPM (in.intel.rhodo) on Intel Xeon Phi x200 series processors
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#############################################################################
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mpirun -np $LMP_CORES $LMP_BIN -in $bench -log none -pk intel 0 omp 3 lrt yes -sf intel
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@ -7,7 +7,7 @@ variable n index 0 # Use NUMA Mapping for Multi-Node
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variable b index 3 # Neighbor binsize
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variable p index 0 # Use Power Measurement
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variable c index 0 # 1 to use collectives for PPPM
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variable d index 0 # 1 to use 'diff ad' for PPPM
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variable d index 1 # 1 to use 'diff ad' for PPPM
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variable x index 4
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variable y index 2
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