14 lines
721 B
Plaintext
14 lines
721 B
Plaintext
ABC is a growing software system for synthesis and verification of
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binary sequential logic circuits appearing in synchronous hardware
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designs. ABC combines scalable logic optimization based on
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And-Inverter Graphs (AIGs), optimal-delay DAG-based technology
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mapping for look-up tables and standard cells, and innovative
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algorithms for sequential synthesis and verification.
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ABC provides an experimental implementation of these algorithms
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and a programming environment for building similar applications.
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Future development will focus on improving the algorithms and making
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most of the packages stand-alone. This will allow the user to
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customize ABC for their needs as if it were a tool-box rather than
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a complete tool.
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