slackbuilds/academic/xschem
A. Tomasini eda3a3abe3 academic/xschem: Update script.
Signed-off-by: Andrew Clemons <andrew.clemons@gmail.com>
Signed-off-by: Willy Sudiarto Raharjo <willysr@slackbuilds.org>
2023-12-06 10:09:31 +07:00
..
README academic/xschem: Update script. 2023-12-06 10:09:31 +07:00
doinst.sh academic/xschem: Update script. 2023-12-06 10:09:31 +07:00
slack-desc
xschem.SlackBuild academic/xschem: Update script. 2023-12-06 10:09:31 +07:00
xschem.desktop
xschem.fig
xschem.info
xschem.png

README

Xschem is a schematic capture program, it allows creation of
hierarchical representation of circuits with a top down approach . By
focusing on interfaces, hierarchy and instance properties a complex
system can be described in terms of simpler building blocks. A VHDL
or Verilog or Spice netlist can be generated from the drawn schematic,
allowing the simulation of the circuit. Key feature of the program is
its drawing engine written in C and using directly the Xlib drawing
primitives; this gives very good speed performance, even on very big
circuits. The user interface is built with the Tcl-Tk toolkit, tcl is
also the extension language used.  - hierarchical schematic drawings,
no limits on size - any object in the schematic can have any sort of
properties (generics in VHDL, parameters in Spice or Verilog) - new
Spice/Verilog primitives can be created, and the netlist format can
be defined by the user -tcl extension language allows the creation
of scripts; any user command in the drawing window has an associated
tcl comand - VHDL / Verilog / Spice netlist, ready for simulation -
Behavioral VHDL / Verilog code can be embedded as one of the properties
of the schematic block.