7954dfaee3
This patch unifies the sun6i AHB1 clock, originally supported with separate mux and divider clks. It also adds support for the pre-divider on the PLL6 input, thus allowing the clock to be muxed to PLL6 with proper clock rate calculation. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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.. | ||
Makefile | ||
clk-a10-hosc.c | ||
clk-a20-gmac.c | ||
clk-factors.c | ||
clk-factors.h | ||
clk-mod0.c | ||
clk-sun6i-apb0-gates.c | ||
clk-sun6i-apb0.c | ||
clk-sun6i-ar100.c | ||
clk-sun8i-apb0.c | ||
clk-sun8i-mbus.c | ||
clk-sun9i-core.c | ||
clk-sunxi.c |