155 lines
5.3 KiB
C
155 lines
5.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/**
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* PCI Endpoint *Controller* (EPC) header file
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*
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* Copyright (C) 2017 Texas Instruments
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* Author: Kishon Vijay Abraham I <kishon@ti.com>
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*/
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#ifndef __LINUX_PCI_EPC_H
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#define __LINUX_PCI_EPC_H
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#include <linux/pci-epf.h>
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struct pci_epc;
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enum pci_epc_irq_type {
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PCI_EPC_IRQ_UNKNOWN,
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PCI_EPC_IRQ_LEGACY,
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PCI_EPC_IRQ_MSI,
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};
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/**
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* struct pci_epc_ops - set of function pointers for performing EPC operations
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* @write_header: ops to populate configuration space header
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* @set_bar: ops to configure the BAR
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* @clear_bar: ops to reset the BAR
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* @map_addr: ops to map CPU address to PCI address
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* @unmap_addr: ops to unmap CPU address and PCI address
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* @set_msi: ops to set the requested number of MSI interrupts in the MSI
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* capability register
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* @get_msi: ops to get the number of MSI interrupts allocated by the RC from
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* the MSI capability register
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* @raise_irq: ops to raise a legacy or MSI interrupt
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* @start: ops to start the PCI link
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* @stop: ops to stop the PCI link
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* @owner: the module owner containing the ops
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*/
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struct pci_epc_ops {
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int (*write_header)(struct pci_epc *epc, u8 func_no,
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struct pci_epf_header *hdr);
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int (*set_bar)(struct pci_epc *epc, u8 func_no,
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enum pci_barno bar,
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dma_addr_t bar_phys, size_t size, int flags);
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void (*clear_bar)(struct pci_epc *epc, u8 func_no,
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enum pci_barno bar);
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int (*map_addr)(struct pci_epc *epc, u8 func_no,
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phys_addr_t addr, u64 pci_addr, size_t size);
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void (*unmap_addr)(struct pci_epc *epc, u8 func_no,
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phys_addr_t addr);
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int (*set_msi)(struct pci_epc *epc, u8 func_no, u8 interrupts);
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int (*get_msi)(struct pci_epc *epc, u8 func_no);
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int (*raise_irq)(struct pci_epc *epc, u8 func_no,
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enum pci_epc_irq_type type, u8 interrupt_num);
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int (*start)(struct pci_epc *epc);
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void (*stop)(struct pci_epc *epc);
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struct module *owner;
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};
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/**
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* struct pci_epc_mem - address space of the endpoint controller
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* @phys_base: physical base address of the PCI address space
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* @size: the size of the PCI address space
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* @bitmap: bitmap to manage the PCI address space
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* @pages: number of bits representing the address region
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* @page_size: size of each page
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*/
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struct pci_epc_mem {
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phys_addr_t phys_base;
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size_t size;
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unsigned long *bitmap;
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size_t page_size;
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int pages;
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};
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/**
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* struct pci_epc - represents the PCI EPC device
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* @dev: PCI EPC device
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* @pci_epf: list of endpoint functions present in this EPC device
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* @ops: function pointers for performing endpoint operations
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* @mem: address space of the endpoint controller
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* @max_functions: max number of functions that can be configured in this EPC
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* @group: configfs group representing the PCI EPC device
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* @lock: spinlock to protect pci_epc ops
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*/
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struct pci_epc {
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struct device dev;
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struct list_head pci_epf;
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const struct pci_epc_ops *ops;
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struct pci_epc_mem *mem;
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u8 max_functions;
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struct config_group *group;
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/* spinlock to protect against concurrent access of EP controller */
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spinlock_t lock;
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};
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#define to_pci_epc(device) container_of((device), struct pci_epc, dev)
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#define pci_epc_create(dev, ops) \
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__pci_epc_create((dev), (ops), THIS_MODULE)
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#define devm_pci_epc_create(dev, ops) \
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__devm_pci_epc_create((dev), (ops), THIS_MODULE)
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#define pci_epc_mem_init(epc, phys_addr, size) \
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__pci_epc_mem_init((epc), (phys_addr), (size), PAGE_SIZE)
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static inline void epc_set_drvdata(struct pci_epc *epc, void *data)
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{
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dev_set_drvdata(&epc->dev, data);
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}
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static inline void *epc_get_drvdata(struct pci_epc *epc)
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{
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return dev_get_drvdata(&epc->dev);
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}
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struct pci_epc *
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__devm_pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
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struct module *owner);
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struct pci_epc *
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__pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
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struct module *owner);
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void devm_pci_epc_destroy(struct device *dev, struct pci_epc *epc);
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void pci_epc_destroy(struct pci_epc *epc);
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int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf);
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void pci_epc_linkup(struct pci_epc *epc);
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void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf);
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int pci_epc_write_header(struct pci_epc *epc, u8 func_no,
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struct pci_epf_header *hdr);
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int pci_epc_set_bar(struct pci_epc *epc, u8 func_no,
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enum pci_barno bar,
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dma_addr_t bar_phys, size_t size, int flags);
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void pci_epc_clear_bar(struct pci_epc *epc, u8 func_no, int bar);
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int pci_epc_map_addr(struct pci_epc *epc, u8 func_no,
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phys_addr_t phys_addr,
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u64 pci_addr, size_t size);
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void pci_epc_unmap_addr(struct pci_epc *epc, u8 func_no,
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phys_addr_t phys_addr);
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int pci_epc_set_msi(struct pci_epc *epc, u8 func_no, u8 interrupts);
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int pci_epc_get_msi(struct pci_epc *epc, u8 func_no);
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int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no,
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enum pci_epc_irq_type type, u8 interrupt_num);
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int pci_epc_start(struct pci_epc *epc);
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void pci_epc_stop(struct pci_epc *epc);
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struct pci_epc *pci_epc_get(const char *epc_name);
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void pci_epc_put(struct pci_epc *epc);
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int __pci_epc_mem_init(struct pci_epc *epc, phys_addr_t phys_addr, size_t size,
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size_t page_size);
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void pci_epc_mem_exit(struct pci_epc *epc);
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void __iomem *pci_epc_mem_alloc_addr(struct pci_epc *epc,
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phys_addr_t *phys_addr, size_t size);
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void pci_epc_mem_free_addr(struct pci_epc *epc, phys_addr_t phys_addr,
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void __iomem *virt_addr, size_t size);
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#endif /* __LINUX_PCI_EPC_H */
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