133 lines
2.8 KiB
C
133 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Jernej Skrabec <jernej.skrabec@siol.net>
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*/
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#include <linux/clk-provider.h>
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#include "sun8i_dw_hdmi.h"
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struct sun8i_phy_clk {
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struct clk_hw hw;
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struct sun8i_hdmi_phy *phy;
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};
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static inline struct sun8i_phy_clk *hw_to_phy_clk(struct clk_hw *hw)
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{
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return container_of(hw, struct sun8i_phy_clk, hw);
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}
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static int sun8i_phy_clk_determine_rate(struct clk_hw *hw,
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struct clk_rate_request *req)
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{
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unsigned long rate = req->rate;
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unsigned long best_rate = 0;
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struct clk_hw *parent;
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int best_div = 1;
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int i;
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parent = clk_hw_get_parent(hw);
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for (i = 1; i <= 16; i++) {
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unsigned long ideal = rate * i;
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unsigned long rounded;
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rounded = clk_hw_round_rate(parent, ideal);
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if (rounded == ideal) {
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best_rate = rounded;
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best_div = i;
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break;
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}
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if (!best_rate ||
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abs(rate - rounded / i) <
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abs(rate - best_rate / best_div)) {
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best_rate = rounded;
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best_div = i;
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}
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}
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req->rate = best_rate / best_div;
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req->best_parent_rate = best_rate;
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req->best_parent_hw = parent;
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return 0;
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}
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static unsigned long sun8i_phy_clk_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct sun8i_phy_clk *priv = hw_to_phy_clk(hw);
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u32 reg;
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regmap_read(priv->phy->regs, SUN8I_HDMI_PHY_PLL_CFG2_REG, ®);
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reg = ((reg >> SUN8I_HDMI_PHY_PLL_CFG2_PREDIV_SHIFT) &
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SUN8I_HDMI_PHY_PLL_CFG2_PREDIV_MSK) + 1;
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return parent_rate / reg;
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}
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static int sun8i_phy_clk_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct sun8i_phy_clk *priv = hw_to_phy_clk(hw);
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unsigned long best_rate = 0;
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u8 best_m = 0, m;
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for (m = 1; m <= 16; m++) {
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unsigned long tmp_rate = parent_rate / m;
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if (tmp_rate > rate)
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continue;
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if (!best_rate ||
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(rate - tmp_rate) < (rate - best_rate)) {
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best_rate = tmp_rate;
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best_m = m;
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}
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}
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regmap_update_bits(priv->phy->regs, SUN8I_HDMI_PHY_PLL_CFG2_REG,
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SUN8I_HDMI_PHY_PLL_CFG2_PREDIV_MSK,
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SUN8I_HDMI_PHY_PLL_CFG2_PREDIV(best_m));
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return 0;
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}
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static const struct clk_ops sun8i_phy_clk_ops = {
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.determine_rate = sun8i_phy_clk_determine_rate,
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.recalc_rate = sun8i_phy_clk_recalc_rate,
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.set_rate = sun8i_phy_clk_set_rate,
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};
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int sun8i_phy_clk_create(struct sun8i_hdmi_phy *phy, struct device *dev)
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{
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struct clk_init_data init;
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struct sun8i_phy_clk *priv;
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const char *parents[1];
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parents[0] = __clk_get_name(phy->clk_pll0);
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if (!parents[0])
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return -ENODEV;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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init.name = "hdmi-phy-clk";
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init.ops = &sun8i_phy_clk_ops;
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init.parent_names = parents;
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init.num_parents = 1;
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init.flags = CLK_SET_RATE_PARENT;
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priv->phy = phy;
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priv->hw.init = &init;
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phy->clk_phy = devm_clk_register(dev, &priv->hw);
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if (IS_ERR(phy->clk_phy))
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return PTR_ERR(phy->clk_phy);
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return 0;
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}
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