107 lines
2.9 KiB
C
107 lines
2.9 KiB
C
/*
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* arch/sh/mm/pg-sh4.c
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*
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* Copyright (C) 1999, 2000, 2002 Niibe Yutaka
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* Copyright (C) 2002 - 2005 Paul Mundt
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*
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* Released under the terms of the GNU GPL v2.0.
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*/
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#include <linux/mm.h>
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#include <linux/mutex.h>
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#include <asm/mmu_context.h>
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#include <asm/cacheflush.h>
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extern struct mutex p3map_mutex[];
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#define CACHE_ALIAS (current_cpu_data.dcache.alias_mask)
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/*
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* clear_user_page
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* @to: P1 address
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* @address: U0 address to be mapped
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* @page: page (virt_to_page(to))
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*/
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void clear_user_page(void *to, unsigned long address, struct page *page)
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{
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__set_bit(PG_mapped, &page->flags);
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if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0)
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clear_page(to);
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else {
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unsigned long phys_addr = PHYSADDR(to);
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unsigned long p3_addr = P3SEG + (address & CACHE_ALIAS);
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pgd_t *pgd = pgd_offset_k(p3_addr);
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pud_t *pud = pud_offset(pgd, p3_addr);
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pmd_t *pmd = pmd_offset(pud, p3_addr);
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pte_t *pte = pte_offset_kernel(pmd, p3_addr);
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pte_t entry;
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unsigned long flags;
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entry = pfn_pte(phys_addr >> PAGE_SHIFT, PAGE_KERNEL);
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mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]);
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set_pte(pte, entry);
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local_irq_save(flags);
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flush_tlb_one(get_asid(), p3_addr);
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local_irq_restore(flags);
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update_mmu_cache(NULL, p3_addr, entry);
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__clear_user_page((void *)p3_addr, to);
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pte_clear(&init_mm, p3_addr, pte);
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mutex_unlock(&p3map_mutex[(address & CACHE_ALIAS)>>12]);
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}
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}
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/*
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* copy_user_page
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* @to: P1 address
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* @from: P1 address
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* @address: U0 address to be mapped
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* @page: page (virt_to_page(to))
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*/
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void copy_user_page(void *to, void *from, unsigned long address,
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struct page *page)
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{
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__set_bit(PG_mapped, &page->flags);
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if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0)
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copy_page(to, from);
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else {
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unsigned long phys_addr = PHYSADDR(to);
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unsigned long p3_addr = P3SEG + (address & CACHE_ALIAS);
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pgd_t *pgd = pgd_offset_k(p3_addr);
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pud_t *pud = pud_offset(pgd, p3_addr);
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pmd_t *pmd = pmd_offset(pud, p3_addr);
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pte_t *pte = pte_offset_kernel(pmd, p3_addr);
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pte_t entry;
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unsigned long flags;
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entry = pfn_pte(phys_addr >> PAGE_SHIFT, PAGE_KERNEL);
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mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]);
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set_pte(pte, entry);
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local_irq_save(flags);
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flush_tlb_one(get_asid(), p3_addr);
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local_irq_restore(flags);
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update_mmu_cache(NULL, p3_addr, entry);
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__copy_user_page((void *)p3_addr, from, to);
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pte_clear(&init_mm, p3_addr, pte);
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mutex_unlock(&p3map_mutex[(address & CACHE_ALIAS)>>12]);
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}
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}
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/*
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* For SH-4, we have our own implementation for ptep_get_and_clear
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*/
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inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
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{
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pte_t pte = *ptep;
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pte_clear(mm, addr, ptep);
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if (!pte_not_present(pte)) {
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unsigned long pfn = pte_pfn(pte);
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if (pfn_valid(pfn)) {
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struct page *page = pfn_to_page(pfn);
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struct address_space *mapping = page_mapping(page);
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if (!mapping || !mapping_writably_mapped(mapping))
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__clear_bit(PG_mapped, &page->flags);
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}
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}
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return pte;
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}
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