301 lines
6.8 KiB
C
301 lines
6.8 KiB
C
/*
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* drivers/char/watchdog/davinci_wdt.c
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*
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* Watchdog driver for DaVinci DM644x/DM646x processors
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*
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* Copyright (C) 2006 Texas Instruments.
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*
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* 2007 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/fs.h>
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#include <linux/miscdevice.h>
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#include <linux/watchdog.h>
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#include <linux/init.h>
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#include <linux/bitops.h>
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#include <linux/platform_device.h>
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#include <linux/spinlock.h>
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#include <linux/uaccess.h>
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#include <linux/io.h>
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#include <linux/device.h>
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#include <linux/clk.h>
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#include <linux/slab.h>
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#define MODULE_NAME "DAVINCI-WDT: "
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#define DEFAULT_HEARTBEAT 60
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#define MAX_HEARTBEAT 600 /* really the max margin is 264/27MHz*/
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/* Timer register set definition */
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#define PID12 (0x0)
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#define EMUMGT (0x4)
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#define TIM12 (0x10)
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#define TIM34 (0x14)
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#define PRD12 (0x18)
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#define PRD34 (0x1C)
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#define TCR (0x20)
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#define TGCR (0x24)
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#define WDTCR (0x28)
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/* TCR bit definitions */
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#define ENAMODE12_DISABLED (0 << 6)
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#define ENAMODE12_ONESHOT (1 << 6)
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#define ENAMODE12_PERIODIC (2 << 6)
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/* TGCR bit definitions */
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#define TIM12RS_UNRESET (1 << 0)
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#define TIM34RS_UNRESET (1 << 1)
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#define TIMMODE_64BIT_WDOG (2 << 2)
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/* WDTCR bit definitions */
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#define WDEN (1 << 14)
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#define WDFLAG (1 << 15)
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#define WDKEY_SEQ0 (0xa5c6 << 16)
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#define WDKEY_SEQ1 (0xda7e << 16)
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static int heartbeat = DEFAULT_HEARTBEAT;
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static DEFINE_SPINLOCK(io_lock);
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static unsigned long wdt_status;
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#define WDT_IN_USE 0
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#define WDT_OK_TO_CLOSE 1
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#define WDT_REGION_INITED 2
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#define WDT_DEVICE_INITED 3
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static struct resource *wdt_mem;
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static void __iomem *wdt_base;
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struct clk *wdt_clk;
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static void wdt_service(void)
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{
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spin_lock(&io_lock);
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/* put watchdog in service state */
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iowrite32(WDKEY_SEQ0, wdt_base + WDTCR);
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/* put watchdog in active state */
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iowrite32(WDKEY_SEQ1, wdt_base + WDTCR);
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spin_unlock(&io_lock);
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}
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static void wdt_enable(void)
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{
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u32 tgcr;
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u32 timer_margin;
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unsigned long wdt_freq;
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wdt_freq = clk_get_rate(wdt_clk);
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spin_lock(&io_lock);
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/* disable, internal clock source */
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iowrite32(0, wdt_base + TCR);
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/* reset timer, set mode to 64-bit watchdog, and unreset */
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iowrite32(0, wdt_base + TGCR);
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tgcr = TIMMODE_64BIT_WDOG | TIM12RS_UNRESET | TIM34RS_UNRESET;
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iowrite32(tgcr, wdt_base + TGCR);
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/* clear counter regs */
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iowrite32(0, wdt_base + TIM12);
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iowrite32(0, wdt_base + TIM34);
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/* set timeout period */
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timer_margin = (((u64)heartbeat * wdt_freq) & 0xffffffff);
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iowrite32(timer_margin, wdt_base + PRD12);
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timer_margin = (((u64)heartbeat * wdt_freq) >> 32);
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iowrite32(timer_margin, wdt_base + PRD34);
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/* enable run continuously */
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iowrite32(ENAMODE12_PERIODIC, wdt_base + TCR);
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/* Once the WDT is in pre-active state write to
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* TIM12, TIM34, PRD12, PRD34, TCR, TGCR, WDTCR are
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* write protected (except for the WDKEY field)
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*/
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/* put watchdog in pre-active state */
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iowrite32(WDKEY_SEQ0 | WDEN, wdt_base + WDTCR);
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/* put watchdog in active state */
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iowrite32(WDKEY_SEQ1 | WDEN, wdt_base + WDTCR);
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spin_unlock(&io_lock);
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}
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static int davinci_wdt_open(struct inode *inode, struct file *file)
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{
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if (test_and_set_bit(WDT_IN_USE, &wdt_status))
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return -EBUSY;
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wdt_enable();
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return nonseekable_open(inode, file);
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}
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static ssize_t
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davinci_wdt_write(struct file *file, const char *data, size_t len,
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loff_t *ppos)
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{
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if (len)
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wdt_service();
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return len;
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}
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static const struct watchdog_info ident = {
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.options = WDIOF_KEEPALIVEPING,
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.identity = "DaVinci Watchdog",
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};
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static long davinci_wdt_ioctl(struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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int ret = -ENOTTY;
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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ret = copy_to_user((struct watchdog_info *)arg, &ident,
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sizeof(ident)) ? -EFAULT : 0;
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break;
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case WDIOC_GETSTATUS:
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case WDIOC_GETBOOTSTATUS:
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ret = put_user(0, (int *)arg);
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break;
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case WDIOC_KEEPALIVE:
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wdt_service();
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ret = 0;
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break;
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case WDIOC_GETTIMEOUT:
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ret = put_user(heartbeat, (int *)arg);
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break;
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}
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return ret;
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}
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static int davinci_wdt_release(struct inode *inode, struct file *file)
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{
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wdt_service();
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clear_bit(WDT_IN_USE, &wdt_status);
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return 0;
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}
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static const struct file_operations davinci_wdt_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = davinci_wdt_write,
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.unlocked_ioctl = davinci_wdt_ioctl,
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.open = davinci_wdt_open,
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.release = davinci_wdt_release,
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};
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static struct miscdevice davinci_wdt_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &davinci_wdt_fops,
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};
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static int __devinit davinci_wdt_probe(struct platform_device *pdev)
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{
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int ret = 0, size;
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struct resource *res;
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struct device *dev = &pdev->dev;
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wdt_clk = clk_get(dev, NULL);
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if (WARN_ON(IS_ERR(wdt_clk)))
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return PTR_ERR(wdt_clk);
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clk_enable(wdt_clk);
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if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
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heartbeat = DEFAULT_HEARTBEAT;
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dev_info(dev, "heartbeat %d sec\n", heartbeat);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (res == NULL) {
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dev_err(dev, "failed to get memory region resource\n");
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return -ENOENT;
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}
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size = resource_size(res);
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wdt_mem = request_mem_region(res->start, size, pdev->name);
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if (wdt_mem == NULL) {
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dev_err(dev, "failed to get memory region\n");
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return -ENOENT;
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}
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wdt_base = ioremap(res->start, size);
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if (!wdt_base) {
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dev_err(dev, "failed to map memory region\n");
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return -ENOMEM;
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}
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ret = misc_register(&davinci_wdt_miscdev);
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if (ret < 0) {
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dev_err(dev, "cannot register misc device\n");
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release_resource(wdt_mem);
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kfree(wdt_mem);
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} else {
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set_bit(WDT_DEVICE_INITED, &wdt_status);
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}
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iounmap(wdt_base);
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return ret;
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}
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static int __devexit davinci_wdt_remove(struct platform_device *pdev)
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{
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misc_deregister(&davinci_wdt_miscdev);
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if (wdt_mem) {
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release_resource(wdt_mem);
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kfree(wdt_mem);
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wdt_mem = NULL;
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}
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clk_disable(wdt_clk);
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clk_put(wdt_clk);
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return 0;
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}
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static struct platform_driver platform_wdt_driver = {
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.driver = {
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.name = "watchdog",
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.owner = THIS_MODULE,
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},
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.probe = davinci_wdt_probe,
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.remove = __devexit_p(davinci_wdt_remove),
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};
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static int __init davinci_wdt_init(void)
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{
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return platform_driver_register(&platform_wdt_driver);
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}
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static void __exit davinci_wdt_exit(void)
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{
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platform_driver_unregister(&platform_wdt_driver);
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}
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module_init(davinci_wdt_init);
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module_exit(davinci_wdt_exit);
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MODULE_AUTHOR("Texas Instruments");
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MODULE_DESCRIPTION("DaVinci Watchdog Driver");
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module_param(heartbeat, int, 0);
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MODULE_PARM_DESC(heartbeat,
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"Watchdog heartbeat period in seconds from 1 to "
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__MODULE_STRING(MAX_HEARTBEAT) ", default "
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__MODULE_STRING(DEFAULT_HEARTBEAT));
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MODULE_LICENSE("GPL");
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MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
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MODULE_ALIAS("platform:watchdog");
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