683 lines
16 KiB
C
683 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* PWM device driver for ST SoCs
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*
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* Copyright (C) 2013-2016 STMicroelectronics (R&D) Limited
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*
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* Author: Ajit Pal Singh <ajitpal.singh@st.com>
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* Lee Jones <lee.jones@linaro.org>
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*/
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#include <linux/clk.h>
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#include <linux/interrupt.h>
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#include <linux/math64.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pwm.h>
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#include <linux/regmap.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/time.h>
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#include <linux/wait.h>
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#define PWM_OUT_VAL(x) (0x00 + (4 * (x))) /* Device's Duty Cycle register */
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#define PWM_CPT_VAL(x) (0x10 + (4 * (x))) /* Capture value */
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#define PWM_CPT_EDGE(x) (0x30 + (4 * (x))) /* Edge to capture on */
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#define STI_PWM_CTRL 0x50 /* Control/Config register */
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#define STI_INT_EN 0x54 /* Interrupt Enable/Disable register */
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#define STI_INT_STA 0x58 /* Interrupt Status register */
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#define PWM_INT_ACK 0x5c
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#define PWM_PRESCALE_LOW_MASK 0x0f
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#define PWM_PRESCALE_HIGH_MASK 0xf0
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#define PWM_CPT_EDGE_MASK 0x03
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#define PWM_INT_ACK_MASK 0x1ff
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#define STI_MAX_CPT_DEVS 4
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#define CPT_DC_MAX 0xff
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/* Regfield IDs */
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enum {
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/* Bits in PWM_CTRL*/
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PWMCLK_PRESCALE_LOW,
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PWMCLK_PRESCALE_HIGH,
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CPTCLK_PRESCALE,
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PWM_OUT_EN,
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PWM_CPT_EN,
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PWM_CPT_INT_EN,
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PWM_CPT_INT_STAT,
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/* Keep last */
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MAX_REGFIELDS
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};
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/*
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* Each capture input can be programmed to detect rising-edge, falling-edge,
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* either edge or neither egde.
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*/
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enum sti_cpt_edge {
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CPT_EDGE_DISABLED,
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CPT_EDGE_RISING,
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CPT_EDGE_FALLING,
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CPT_EDGE_BOTH,
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};
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struct sti_cpt_ddata {
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u32 snapshot[3];
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unsigned int index;
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struct mutex lock;
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wait_queue_head_t wait;
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};
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struct sti_pwm_compat_data {
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const struct reg_field *reg_fields;
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unsigned int pwm_num_devs;
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unsigned int cpt_num_devs;
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unsigned int max_pwm_cnt;
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unsigned int max_prescale;
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};
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struct sti_pwm_chip {
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struct device *dev;
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struct clk *pwm_clk;
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struct clk *cpt_clk;
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struct regmap *regmap;
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struct sti_pwm_compat_data *cdata;
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struct regmap_field *prescale_low;
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struct regmap_field *prescale_high;
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struct regmap_field *pwm_out_en;
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struct regmap_field *pwm_cpt_en;
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struct regmap_field *pwm_cpt_int_en;
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struct regmap_field *pwm_cpt_int_stat;
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struct pwm_chip chip;
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struct pwm_device *cur;
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unsigned long configured;
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unsigned int en_count;
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struct mutex sti_pwm_lock; /* To sync between enable/disable calls */
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void __iomem *mmio;
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};
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static const struct reg_field sti_pwm_regfields[MAX_REGFIELDS] = {
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[PWMCLK_PRESCALE_LOW] = REG_FIELD(STI_PWM_CTRL, 0, 3),
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[PWMCLK_PRESCALE_HIGH] = REG_FIELD(STI_PWM_CTRL, 11, 14),
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[CPTCLK_PRESCALE] = REG_FIELD(STI_PWM_CTRL, 4, 8),
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[PWM_OUT_EN] = REG_FIELD(STI_PWM_CTRL, 9, 9),
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[PWM_CPT_EN] = REG_FIELD(STI_PWM_CTRL, 10, 10),
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[PWM_CPT_INT_EN] = REG_FIELD(STI_INT_EN, 1, 4),
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[PWM_CPT_INT_STAT] = REG_FIELD(STI_INT_STA, 1, 4),
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};
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static inline struct sti_pwm_chip *to_sti_pwmchip(struct pwm_chip *chip)
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{
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return container_of(chip, struct sti_pwm_chip, chip);
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}
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/*
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* Calculate the prescaler value corresponding to the period.
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*/
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static int sti_pwm_get_prescale(struct sti_pwm_chip *pc, unsigned long period,
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unsigned int *prescale)
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{
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struct sti_pwm_compat_data *cdata = pc->cdata;
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unsigned long clk_rate;
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unsigned long value;
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unsigned int ps;
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clk_rate = clk_get_rate(pc->pwm_clk);
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if (!clk_rate) {
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dev_err(pc->dev, "failed to get clock rate\n");
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return -EINVAL;
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}
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/*
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* prescale = ((period_ns * clk_rate) / (10^9 * (max_pwm_cnt + 1)) - 1
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*/
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value = NSEC_PER_SEC / clk_rate;
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value *= cdata->max_pwm_cnt + 1;
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if (period % value)
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return -EINVAL;
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ps = period / value - 1;
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if (ps > cdata->max_prescale)
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return -EINVAL;
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*prescale = ps;
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return 0;
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}
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/*
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* For STiH4xx PWM IP, the PWM period is fixed to 256 local clock cycles. The
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* only way to change the period (apart from changing the PWM input clock) is
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* to change the PWM clock prescaler.
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*
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* The prescaler is of 8 bits, so 256 prescaler values and hence 256 possible
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* period values are supported (for a particular clock rate). The requested
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* period will be applied only if it matches one of these 256 values.
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*/
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static int sti_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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int duty_ns, int period_ns)
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{
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struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
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struct sti_pwm_compat_data *cdata = pc->cdata;
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unsigned int ncfg, value, prescale = 0;
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struct pwm_device *cur = pc->cur;
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struct device *dev = pc->dev;
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bool period_same = false;
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int ret;
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ncfg = hweight_long(pc->configured);
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if (ncfg)
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period_same = (period_ns == pwm_get_period(cur));
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/*
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* Allow configuration changes if one of the following conditions
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* satisfy.
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* 1. No devices have been configured.
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* 2. Only one device has been configured and the new request is for
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* the same device.
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* 3. Only one device has been configured and the new request is for
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* a new device and period of the new device is same as the current
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* configured period.
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* 4. More than one devices are configured and period of the new
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* requestis the same as the current period.
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*/
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if (!ncfg ||
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((ncfg == 1) && (pwm->hwpwm == cur->hwpwm)) ||
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((ncfg == 1) && (pwm->hwpwm != cur->hwpwm) && period_same) ||
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((ncfg > 1) && period_same)) {
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/* Enable clock before writing to PWM registers. */
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ret = clk_enable(pc->pwm_clk);
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if (ret)
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return ret;
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ret = clk_enable(pc->cpt_clk);
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if (ret)
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return ret;
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if (!period_same) {
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ret = sti_pwm_get_prescale(pc, period_ns, &prescale);
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if (ret)
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goto clk_dis;
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value = prescale & PWM_PRESCALE_LOW_MASK;
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ret = regmap_field_write(pc->prescale_low, value);
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if (ret)
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goto clk_dis;
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value = (prescale & PWM_PRESCALE_HIGH_MASK) >> 4;
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ret = regmap_field_write(pc->prescale_high, value);
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if (ret)
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goto clk_dis;
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}
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/*
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* When PWMVal == 0, PWM pulse = 1 local clock cycle.
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* When PWMVal == max_pwm_count,
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* PWM pulse = (max_pwm_count + 1) local cycles,
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* that is continuous pulse: signal never goes low.
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*/
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value = cdata->max_pwm_cnt * duty_ns / period_ns;
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ret = regmap_write(pc->regmap, PWM_OUT_VAL(pwm->hwpwm), value);
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if (ret)
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goto clk_dis;
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ret = regmap_field_write(pc->pwm_cpt_int_en, 0);
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set_bit(pwm->hwpwm, &pc->configured);
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pc->cur = pwm;
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dev_dbg(dev, "prescale:%u, period:%i, duty:%i, value:%u\n",
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prescale, period_ns, duty_ns, value);
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} else {
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return -EINVAL;
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}
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clk_dis:
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clk_disable(pc->pwm_clk);
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clk_disable(pc->cpt_clk);
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return ret;
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}
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static int sti_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
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struct device *dev = pc->dev;
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int ret = 0;
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/*
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* Since we have a common enable for all PWM devices, do not enable if
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* already enabled.
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*/
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mutex_lock(&pc->sti_pwm_lock);
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if (!pc->en_count) {
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ret = clk_enable(pc->pwm_clk);
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if (ret)
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goto out;
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ret = clk_enable(pc->cpt_clk);
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if (ret)
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goto out;
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ret = regmap_field_write(pc->pwm_out_en, 1);
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if (ret) {
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dev_err(dev, "failed to enable PWM device %u: %d\n",
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pwm->hwpwm, ret);
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goto out;
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}
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}
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pc->en_count++;
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out:
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mutex_unlock(&pc->sti_pwm_lock);
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return ret;
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}
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static void sti_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
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mutex_lock(&pc->sti_pwm_lock);
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if (--pc->en_count) {
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mutex_unlock(&pc->sti_pwm_lock);
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return;
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}
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regmap_field_write(pc->pwm_out_en, 0);
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clk_disable(pc->pwm_clk);
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clk_disable(pc->cpt_clk);
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mutex_unlock(&pc->sti_pwm_lock);
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}
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static void sti_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
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clear_bit(pwm->hwpwm, &pc->configured);
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}
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static int sti_pwm_capture(struct pwm_chip *chip, struct pwm_device *pwm,
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struct pwm_capture *result, unsigned long timeout)
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{
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struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
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struct sti_pwm_compat_data *cdata = pc->cdata;
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struct sti_cpt_ddata *ddata = pwm_get_chip_data(pwm);
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struct device *dev = pc->dev;
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unsigned int effective_ticks;
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unsigned long long high, low;
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int ret;
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if (pwm->hwpwm >= cdata->cpt_num_devs) {
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dev_err(dev, "device %u is not valid\n", pwm->hwpwm);
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return -EINVAL;
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}
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mutex_lock(&ddata->lock);
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ddata->index = 0;
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/* Prepare capture measurement */
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regmap_write(pc->regmap, PWM_CPT_EDGE(pwm->hwpwm), CPT_EDGE_RISING);
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regmap_field_write(pc->pwm_cpt_int_en, BIT(pwm->hwpwm));
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/* Enable capture */
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ret = regmap_field_write(pc->pwm_cpt_en, 1);
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if (ret) {
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dev_err(dev, "failed to enable PWM capture %u: %d\n",
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pwm->hwpwm, ret);
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goto out;
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}
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ret = wait_event_interruptible_timeout(ddata->wait, ddata->index > 1,
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msecs_to_jiffies(timeout));
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regmap_write(pc->regmap, PWM_CPT_EDGE(pwm->hwpwm), CPT_EDGE_DISABLED);
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if (ret == -ERESTARTSYS)
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goto out;
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switch (ddata->index) {
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case 0:
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case 1:
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/*
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* Getting here could mean:
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* - input signal is constant of less than 1 Hz
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* - there is no input signal at all
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*
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* In such case the frequency is rounded down to 0
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*/
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result->period = 0;
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result->duty_cycle = 0;
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break;
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case 2:
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/* We have everying we need */
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high = ddata->snapshot[1] - ddata->snapshot[0];
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low = ddata->snapshot[2] - ddata->snapshot[1];
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effective_ticks = clk_get_rate(pc->cpt_clk);
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result->period = (high + low) * NSEC_PER_SEC;
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result->period /= effective_ticks;
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result->duty_cycle = high * NSEC_PER_SEC;
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result->duty_cycle /= effective_ticks;
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break;
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default:
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dev_err(dev, "internal error\n");
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break;
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}
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out:
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/* Disable capture */
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regmap_field_write(pc->pwm_cpt_en, 0);
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mutex_unlock(&ddata->lock);
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return ret;
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}
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static const struct pwm_ops sti_pwm_ops = {
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.capture = sti_pwm_capture,
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.config = sti_pwm_config,
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.enable = sti_pwm_enable,
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.disable = sti_pwm_disable,
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.free = sti_pwm_free,
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.owner = THIS_MODULE,
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};
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static irqreturn_t sti_pwm_interrupt(int irq, void *data)
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{
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struct sti_pwm_chip *pc = data;
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struct device *dev = pc->dev;
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struct sti_cpt_ddata *ddata;
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int devicenum;
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unsigned int cpt_int_stat;
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unsigned int reg;
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int ret = IRQ_NONE;
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ret = regmap_field_read(pc->pwm_cpt_int_stat, &cpt_int_stat);
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if (ret)
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return ret;
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while (cpt_int_stat) {
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devicenum = ffs(cpt_int_stat) - 1;
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ddata = pwm_get_chip_data(&pc->chip.pwms[devicenum]);
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/*
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* Capture input:
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* _______ _______
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* | | | |
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* __| |_________________| |________
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* ^0 ^1 ^2
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*
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* Capture start by the first available rising edge. When a
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* capture event occurs, capture value (CPT_VALx) is stored,
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* index incremented, capture edge changed.
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*
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* After the capture, if the index > 1, we have collected the
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* necessary data so we signal the thread waiting for it and
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* disable the capture by setting capture edge to none
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*/
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regmap_read(pc->regmap,
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PWM_CPT_VAL(devicenum),
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&ddata->snapshot[ddata->index]);
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switch (ddata->index) {
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case 0:
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case 1:
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regmap_read(pc->regmap, PWM_CPT_EDGE(devicenum), ®);
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reg ^= PWM_CPT_EDGE_MASK;
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regmap_write(pc->regmap, PWM_CPT_EDGE(devicenum), reg);
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ddata->index++;
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break;
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case 2:
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regmap_write(pc->regmap,
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PWM_CPT_EDGE(devicenum),
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CPT_EDGE_DISABLED);
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wake_up(&ddata->wait);
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break;
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default:
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dev_err(dev, "Internal error\n");
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}
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cpt_int_stat &= ~BIT_MASK(devicenum);
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ret = IRQ_HANDLED;
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}
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/* Just ACK everything */
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regmap_write(pc->regmap, PWM_INT_ACK, PWM_INT_ACK_MASK);
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return ret;
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}
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static int sti_pwm_probe_dt(struct sti_pwm_chip *pc)
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{
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struct device *dev = pc->dev;
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const struct reg_field *reg_fields;
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struct device_node *np = dev->of_node;
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struct sti_pwm_compat_data *cdata = pc->cdata;
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u32 num_devs;
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int ret;
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ret = of_property_read_u32(np, "st,pwm-num-chan", &num_devs);
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if (!ret)
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cdata->pwm_num_devs = num_devs;
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ret = of_property_read_u32(np, "st,capture-num-chan", &num_devs);
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if (!ret)
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cdata->cpt_num_devs = num_devs;
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if (!cdata->pwm_num_devs && !cdata->cpt_num_devs) {
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dev_err(dev, "No channels configured\n");
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return -EINVAL;
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}
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reg_fields = cdata->reg_fields;
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pc->prescale_low = devm_regmap_field_alloc(dev, pc->regmap,
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reg_fields[PWMCLK_PRESCALE_LOW]);
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if (IS_ERR(pc->prescale_low))
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return PTR_ERR(pc->prescale_low);
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pc->prescale_high = devm_regmap_field_alloc(dev, pc->regmap,
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reg_fields[PWMCLK_PRESCALE_HIGH]);
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if (IS_ERR(pc->prescale_high))
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return PTR_ERR(pc->prescale_high);
|
|
|
|
pc->pwm_out_en = devm_regmap_field_alloc(dev, pc->regmap,
|
|
reg_fields[PWM_OUT_EN]);
|
|
if (IS_ERR(pc->pwm_out_en))
|
|
return PTR_ERR(pc->pwm_out_en);
|
|
|
|
pc->pwm_cpt_en = devm_regmap_field_alloc(dev, pc->regmap,
|
|
reg_fields[PWM_CPT_EN]);
|
|
if (IS_ERR(pc->pwm_cpt_en))
|
|
return PTR_ERR(pc->pwm_cpt_en);
|
|
|
|
pc->pwm_cpt_int_en = devm_regmap_field_alloc(dev, pc->regmap,
|
|
reg_fields[PWM_CPT_INT_EN]);
|
|
if (IS_ERR(pc->pwm_cpt_int_en))
|
|
return PTR_ERR(pc->pwm_cpt_int_en);
|
|
|
|
pc->pwm_cpt_int_stat = devm_regmap_field_alloc(dev, pc->regmap,
|
|
reg_fields[PWM_CPT_INT_STAT]);
|
|
if (PTR_ERR_OR_ZERO(pc->pwm_cpt_int_stat))
|
|
return PTR_ERR(pc->pwm_cpt_int_stat);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct regmap_config sti_pwm_regmap_config = {
|
|
.reg_bits = 32,
|
|
.val_bits = 32,
|
|
.reg_stride = 4,
|
|
};
|
|
|
|
static int sti_pwm_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct sti_pwm_compat_data *cdata;
|
|
struct sti_pwm_chip *pc;
|
|
unsigned int i;
|
|
int irq, ret;
|
|
|
|
pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
|
|
if (!pc)
|
|
return -ENOMEM;
|
|
|
|
cdata = devm_kzalloc(dev, sizeof(*cdata), GFP_KERNEL);
|
|
if (!cdata)
|
|
return -ENOMEM;
|
|
|
|
pc->mmio = devm_platform_ioremap_resource(pdev, 0);
|
|
if (IS_ERR(pc->mmio))
|
|
return PTR_ERR(pc->mmio);
|
|
|
|
pc->regmap = devm_regmap_init_mmio(dev, pc->mmio,
|
|
&sti_pwm_regmap_config);
|
|
if (IS_ERR(pc->regmap))
|
|
return PTR_ERR(pc->regmap);
|
|
|
|
irq = platform_get_irq(pdev, 0);
|
|
if (irq < 0)
|
|
return irq;
|
|
|
|
ret = devm_request_irq(&pdev->dev, irq, sti_pwm_interrupt, 0,
|
|
pdev->name, pc);
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev, "Failed to request IRQ\n");
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* Setup PWM data with default values: some values could be replaced
|
|
* with specific ones provided from Device Tree.
|
|
*/
|
|
cdata->reg_fields = sti_pwm_regfields;
|
|
cdata->max_prescale = 0xff;
|
|
cdata->max_pwm_cnt = 255;
|
|
cdata->pwm_num_devs = 0;
|
|
cdata->cpt_num_devs = 0;
|
|
|
|
pc->cdata = cdata;
|
|
pc->dev = dev;
|
|
pc->en_count = 0;
|
|
mutex_init(&pc->sti_pwm_lock);
|
|
|
|
ret = sti_pwm_probe_dt(pc);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (cdata->pwm_num_devs) {
|
|
pc->pwm_clk = of_clk_get_by_name(dev->of_node, "pwm");
|
|
if (IS_ERR(pc->pwm_clk)) {
|
|
dev_err(dev, "failed to get PWM clock\n");
|
|
return PTR_ERR(pc->pwm_clk);
|
|
}
|
|
|
|
ret = clk_prepare(pc->pwm_clk);
|
|
if (ret) {
|
|
dev_err(dev, "failed to prepare clock\n");
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
if (cdata->cpt_num_devs) {
|
|
pc->cpt_clk = of_clk_get_by_name(dev->of_node, "capture");
|
|
if (IS_ERR(pc->cpt_clk)) {
|
|
dev_err(dev, "failed to get PWM capture clock\n");
|
|
return PTR_ERR(pc->cpt_clk);
|
|
}
|
|
|
|
ret = clk_prepare(pc->cpt_clk);
|
|
if (ret) {
|
|
dev_err(dev, "failed to prepare clock\n");
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
pc->chip.dev = dev;
|
|
pc->chip.ops = &sti_pwm_ops;
|
|
pc->chip.base = -1;
|
|
pc->chip.npwm = pc->cdata->pwm_num_devs;
|
|
|
|
ret = pwmchip_add(&pc->chip);
|
|
if (ret < 0) {
|
|
clk_unprepare(pc->pwm_clk);
|
|
clk_unprepare(pc->cpt_clk);
|
|
return ret;
|
|
}
|
|
|
|
for (i = 0; i < cdata->cpt_num_devs; i++) {
|
|
struct sti_cpt_ddata *ddata;
|
|
|
|
ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL);
|
|
if (!ddata)
|
|
return -ENOMEM;
|
|
|
|
init_waitqueue_head(&ddata->wait);
|
|
mutex_init(&ddata->lock);
|
|
|
|
pwm_set_chip_data(&pc->chip.pwms[i], ddata);
|
|
}
|
|
|
|
platform_set_drvdata(pdev, pc);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sti_pwm_remove(struct platform_device *pdev)
|
|
{
|
|
struct sti_pwm_chip *pc = platform_get_drvdata(pdev);
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < pc->cdata->pwm_num_devs; i++)
|
|
pwm_disable(&pc->chip.pwms[i]);
|
|
|
|
clk_unprepare(pc->pwm_clk);
|
|
clk_unprepare(pc->cpt_clk);
|
|
|
|
return pwmchip_remove(&pc->chip);
|
|
}
|
|
|
|
static const struct of_device_id sti_pwm_of_match[] = {
|
|
{ .compatible = "st,sti-pwm", },
|
|
{ /* sentinel */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, sti_pwm_of_match);
|
|
|
|
static struct platform_driver sti_pwm_driver = {
|
|
.driver = {
|
|
.name = "sti-pwm",
|
|
.of_match_table = sti_pwm_of_match,
|
|
},
|
|
.probe = sti_pwm_probe,
|
|
.remove = sti_pwm_remove,
|
|
};
|
|
module_platform_driver(sti_pwm_driver);
|
|
|
|
MODULE_AUTHOR("Ajit Pal Singh <ajitpal.singh@st.com>");
|
|
MODULE_DESCRIPTION("STMicroelectronics ST PWM driver");
|
|
MODULE_LICENSE("GPL");
|