52 lines
1.5 KiB
C
52 lines
1.5 KiB
C
#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <asm/ip32/ip32_ints.h>
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/*
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* O2 has up to 5 PCI devices connected into the MACE bridge. The device
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* map looks like this:
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*
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* 0 aic7xxx 0
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* 1 aic7xxx 1
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* 2 expansion slot
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* 3 N/C
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* 4 N/C
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*/
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#define SCSI0 MACEPCI_SCSI0_IRQ
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#define SCSI1 MACEPCI_SCSI1_IRQ
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#define INTA0 MACEPCI_SLOT0_IRQ
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#define INTA1 MACEPCI_SLOT1_IRQ
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#define INTA2 MACEPCI_SLOT2_IRQ
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#define INTB MACEPCI_SHARED0_IRQ
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#define INTC MACEPCI_SHARED1_IRQ
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#define INTD MACEPCI_SHARED2_IRQ
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static char irq_tab_mace[][5] __initdata = {
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/* Dummy INT#A INT#B INT#C INT#D */
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{0, 0, 0, 0, 0}, /* This is placeholder row - never used */
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{0, SCSI0, SCSI0, SCSI0, SCSI0},
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{0, SCSI1, SCSI1, SCSI1, SCSI1},
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{0, INTA0, INTB, INTC, INTD},
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{0, INTA1, INTC, INTD, INTB},
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{0, INTA2, INTD, INTB, INTC},
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};
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/*
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* Given a PCI slot number (a la PCI_SLOT(...)) and the interrupt pin of
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* the device (1-4 => A-D), tell what irq to use. Note that we don't
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* in theory have slots 4 and 5, and we never normally use the shared
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* irqs. I suppose a device without a pin A will thank us for doing it
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* right if there exists such a broken piece of crap.
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*/
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int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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{
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return irq_tab_mace[slot][pin];
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}
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/* Do platform specific device initialization at pci_enable_device() time */
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int pcibios_plat_dev_init(struct pci_dev *dev)
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{
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return 0;
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}
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