468 lines
10 KiB
C
468 lines
10 KiB
C
/*
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* SMP initialisation and IPI support
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* Based on arch/arm/kernel/smp.c
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*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/cache.h>
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#include <linux/profile.h>
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#include <linux/errno.h>
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#include <linux/mm.h>
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#include <linux/err.h>
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#include <linux/cpu.h>
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#include <linux/smp.h>
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#include <linux/seq_file.h>
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#include <linux/irq.h>
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#include <linux/percpu.h>
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#include <linux/clockchips.h>
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#include <linux/completion.h>
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#include <linux/of.h>
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#include <asm/atomic.h>
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#include <asm/cacheflush.h>
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#include <asm/cputype.h>
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#include <asm/mmu_context.h>
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#include <asm/pgtable.h>
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#include <asm/pgalloc.h>
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#include <asm/processor.h>
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#include <asm/sections.h>
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#include <asm/tlbflush.h>
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#include <asm/ptrace.h>
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/*
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* as from 2.5, kernels no longer have an init_tasks structure
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* so we need some other way of telling a new secondary core
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* where to place its SVC stack
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*/
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struct secondary_data secondary_data;
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volatile unsigned long secondary_holding_pen_release = -1;
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enum ipi_msg_type {
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IPI_RESCHEDULE,
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IPI_CALL_FUNC,
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IPI_CALL_FUNC_SINGLE,
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IPI_CPU_STOP,
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};
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static DEFINE_RAW_SPINLOCK(boot_lock);
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/*
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* Write secondary_holding_pen_release in a way that is guaranteed to be
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* visible to all observers, irrespective of whether they're taking part
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* in coherency or not. This is necessary for the hotplug code to work
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* reliably.
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*/
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static void __cpuinit write_pen_release(int val)
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{
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void *start = (void *)&secondary_holding_pen_release;
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unsigned long size = sizeof(secondary_holding_pen_release);
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secondary_holding_pen_release = val;
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__flush_dcache_area(start, size);
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}
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/*
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* Boot a secondary CPU, and assign it the specified idle task.
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* This also gives us the initial stack to use for this CPU.
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*/
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static int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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unsigned long timeout;
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/*
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* Set synchronisation state between this boot processor
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* and the secondary one
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*/
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raw_spin_lock(&boot_lock);
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/*
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* Update the pen release flag.
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*/
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write_pen_release(cpu);
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/*
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* Send an event, causing the secondaries to read pen_release.
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*/
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sev();
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timeout = jiffies + (1 * HZ);
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while (time_before(jiffies, timeout)) {
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if (secondary_holding_pen_release == -1UL)
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break;
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udelay(10);
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}
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/*
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* Now the secondary core is starting up let it run its
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* calibrations, then wait for it to finish
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*/
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raw_spin_unlock(&boot_lock);
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return secondary_holding_pen_release != -1 ? -ENOSYS : 0;
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}
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static DECLARE_COMPLETION(cpu_running);
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int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
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{
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int ret;
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/*
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* We need to tell the secondary core where to find its stack and the
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* page tables.
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*/
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secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
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__flush_dcache_area(&secondary_data, sizeof(secondary_data));
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/*
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* Now bring the CPU into our world.
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*/
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ret = boot_secondary(cpu, idle);
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if (ret == 0) {
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/*
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* CPU was successfully started, wait for it to come online or
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* time out.
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*/
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wait_for_completion_timeout(&cpu_running,
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msecs_to_jiffies(1000));
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if (!cpu_online(cpu)) {
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pr_crit("CPU%u: failed to come online\n", cpu);
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ret = -EIO;
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}
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} else {
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pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
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}
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secondary_data.stack = NULL;
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return ret;
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}
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/*
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* This is the secondary CPU boot entry. We're using this CPUs
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* idle thread stack, but a set of temporary page tables.
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*/
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asmlinkage void __cpuinit secondary_start_kernel(void)
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{
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struct mm_struct *mm = &init_mm;
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unsigned int cpu = smp_processor_id();
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printk("CPU%u: Booted secondary processor\n", cpu);
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/*
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* All kernel threads share the same mm context; grab a
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* reference and switch to it.
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*/
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atomic_inc(&mm->mm_count);
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current->active_mm = mm;
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cpumask_set_cpu(cpu, mm_cpumask(mm));
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/*
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* TTBR0 is only used for the identity mapping at this stage. Make it
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* point to zero page to avoid speculatively fetching new entries.
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*/
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cpu_set_reserved_ttbr0();
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flush_tlb_all();
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preempt_disable();
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trace_hardirqs_off();
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/*
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* Let the primary processor know we're out of the
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* pen, then head off into the C entry point
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*/
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write_pen_release(-1);
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/*
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* Synchronise with the boot thread.
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*/
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raw_spin_lock(&boot_lock);
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raw_spin_unlock(&boot_lock);
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/*
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* Enable local interrupts.
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*/
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notify_cpu_starting(cpu);
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local_irq_enable();
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local_fiq_enable();
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/*
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* OK, now it's safe to let the boot CPU continue. Wait for
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* the CPU migration code to notice that the CPU is online
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* before we continue.
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*/
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set_cpu_online(cpu, true);
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complete(&cpu_running);
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/*
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* OK, it's off to the idle thread for us
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*/
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cpu_idle();
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}
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void __init smp_cpus_done(unsigned int max_cpus)
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{
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unsigned long bogosum = loops_per_jiffy * num_online_cpus();
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pr_info("SMP: Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
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num_online_cpus(), bogosum / (500000/HZ),
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(bogosum / (5000/HZ)) % 100);
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}
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void __init smp_prepare_boot_cpu(void)
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{
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}
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static void (*smp_cross_call)(const struct cpumask *, unsigned int);
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static phys_addr_t cpu_release_addr[NR_CPUS];
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/*
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* Enumerate the possible CPU set from the device tree.
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*/
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void __init smp_init_cpus(void)
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{
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const char *enable_method;
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struct device_node *dn = NULL;
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int cpu = 0;
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while ((dn = of_find_node_by_type(dn, "cpu"))) {
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if (cpu >= NR_CPUS)
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goto next;
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/*
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* We currently support only the "spin-table" enable-method.
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*/
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enable_method = of_get_property(dn, "enable-method", NULL);
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if (!enable_method || strcmp(enable_method, "spin-table")) {
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pr_err("CPU %d: missing or invalid enable-method property: %s\n",
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cpu, enable_method);
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goto next;
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}
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/*
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* Determine the address from which the CPU is polling.
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*/
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if (of_property_read_u64(dn, "cpu-release-addr",
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&cpu_release_addr[cpu])) {
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pr_err("CPU %d: missing or invalid cpu-release-addr property\n",
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cpu);
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goto next;
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}
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set_cpu_possible(cpu, true);
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next:
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cpu++;
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}
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/* sanity check */
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if (cpu > NR_CPUS)
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pr_warning("no. of cores (%d) greater than configured maximum of %d - clipping\n",
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cpu, NR_CPUS);
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}
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void __init smp_prepare_cpus(unsigned int max_cpus)
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{
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int cpu;
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void **release_addr;
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unsigned int ncores = num_possible_cpus();
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/*
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* are we trying to boot more cores than exist?
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*/
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if (max_cpus > ncores)
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max_cpus = ncores;
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/*
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* Initialise the present map (which describes the set of CPUs
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* actually populated at the present time) and release the
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* secondaries from the bootloader.
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*/
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for_each_possible_cpu(cpu) {
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if (max_cpus == 0)
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break;
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if (!cpu_release_addr[cpu])
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continue;
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release_addr = __va(cpu_release_addr[cpu]);
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release_addr[0] = (void *)__pa(secondary_holding_pen);
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__flush_dcache_area(release_addr, sizeof(release_addr[0]));
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set_cpu_present(cpu, true);
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max_cpus--;
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}
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/*
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* Send an event to wake up the secondaries.
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*/
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sev();
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}
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void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
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{
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smp_cross_call = fn;
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}
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void arch_send_call_function_ipi_mask(const struct cpumask *mask)
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{
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smp_cross_call(mask, IPI_CALL_FUNC);
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}
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void arch_send_call_function_single_ipi(int cpu)
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{
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smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
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}
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static const char *ipi_types[NR_IPI] = {
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#define S(x,s) [x - IPI_RESCHEDULE] = s
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S(IPI_RESCHEDULE, "Rescheduling interrupts"),
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S(IPI_CALL_FUNC, "Function call interrupts"),
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S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"),
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S(IPI_CPU_STOP, "CPU stop interrupts"),
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};
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void show_ipi_list(struct seq_file *p, int prec)
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{
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unsigned int cpu, i;
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for (i = 0; i < NR_IPI; i++) {
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seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i + IPI_RESCHEDULE,
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prec >= 4 ? " " : "");
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for_each_present_cpu(cpu)
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seq_printf(p, "%10u ",
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__get_irq_stat(cpu, ipi_irqs[i]));
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seq_printf(p, " %s\n", ipi_types[i]);
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}
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}
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u64 smp_irq_stat_cpu(unsigned int cpu)
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{
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u64 sum = 0;
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int i;
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for (i = 0; i < NR_IPI; i++)
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sum += __get_irq_stat(cpu, ipi_irqs[i]);
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return sum;
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}
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static DEFINE_RAW_SPINLOCK(stop_lock);
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/*
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* ipi_cpu_stop - handle IPI from smp_send_stop()
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*/
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static void ipi_cpu_stop(unsigned int cpu)
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{
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if (system_state == SYSTEM_BOOTING ||
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system_state == SYSTEM_RUNNING) {
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raw_spin_lock(&stop_lock);
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pr_crit("CPU%u: stopping\n", cpu);
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dump_stack();
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raw_spin_unlock(&stop_lock);
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}
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set_cpu_online(cpu, false);
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local_fiq_disable();
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local_irq_disable();
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while (1)
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cpu_relax();
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}
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/*
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* Main handler for inter-processor interrupts
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*/
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void handle_IPI(int ipinr, struct pt_regs *regs)
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{
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unsigned int cpu = smp_processor_id();
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struct pt_regs *old_regs = set_irq_regs(regs);
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if (ipinr >= IPI_RESCHEDULE && ipinr < IPI_RESCHEDULE + NR_IPI)
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__inc_irq_stat(cpu, ipi_irqs[ipinr - IPI_RESCHEDULE]);
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switch (ipinr) {
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case IPI_RESCHEDULE:
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scheduler_ipi();
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break;
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case IPI_CALL_FUNC:
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irq_enter();
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generic_smp_call_function_interrupt();
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irq_exit();
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break;
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case IPI_CALL_FUNC_SINGLE:
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irq_enter();
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generic_smp_call_function_single_interrupt();
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irq_exit();
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break;
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case IPI_CPU_STOP:
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irq_enter();
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ipi_cpu_stop(cpu);
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irq_exit();
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break;
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default:
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pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
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break;
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}
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set_irq_regs(old_regs);
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}
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void smp_send_reschedule(int cpu)
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{
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smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
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}
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void smp_send_stop(void)
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{
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unsigned long timeout;
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if (num_online_cpus() > 1) {
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cpumask_t mask;
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cpumask_copy(&mask, cpu_online_mask);
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cpu_clear(smp_processor_id(), mask);
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smp_cross_call(&mask, IPI_CPU_STOP);
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}
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/* Wait up to one second for other CPUs to stop */
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timeout = USEC_PER_SEC;
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while (num_online_cpus() > 1 && timeout--)
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udelay(1);
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if (num_online_cpus() > 1)
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pr_warning("SMP: failed to stop secondary CPUs\n");
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}
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/*
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* not supported here
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*/
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int setup_profiling_timer(unsigned int multiplier)
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{
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return -EINVAL;
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}
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