74 lines
2.0 KiB
C
74 lines
2.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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*
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* Copyright (C) 2013 Freescale Semiconductor, Inc.
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*/
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#ifndef __FSL_PAMU_DOMAIN_H
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#define __FSL_PAMU_DOMAIN_H
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#include "fsl_pamu.h"
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struct dma_window {
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phys_addr_t paddr;
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u64 size;
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int valid;
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int prot;
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};
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struct fsl_dma_domain {
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/*
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* Indicates the geometry size for the domain.
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* This would be set when the geometry is
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* configured for the domain.
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*/
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dma_addr_t geom_size;
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/*
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* Number of windows assocaited with this domain.
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* During domain initialization, it is set to the
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* the maximum number of subwindows allowed for a LIODN.
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* Minimum value for this is 1 indicating a single PAMU
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* window, without any sub windows. Value can be set/
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* queried by set_attr/get_attr API for DOMAIN_ATTR_WINDOWS.
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* Value can only be set once the geometry has been configured.
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*/
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u32 win_cnt;
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/*
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* win_arr contains information of the configured
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* windows for a domain. This is allocated only
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* when the number of windows for the domain are
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* set.
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*/
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struct dma_window *win_arr;
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/* list of devices associated with the domain */
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struct list_head devices;
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/* dma_domain states:
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* mapped - A particular mapping has been created
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* within the configured geometry.
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* enabled - DMA has been enabled for the given
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* domain. This translates to setting of the
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* valid bit for the primary PAACE in the PAMU
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* PAACT table. Domain geometry should be set and
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* it must have a valid mapping before DMA can be
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* enabled for it.
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*
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*/
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int mapped;
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int enabled;
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/* stash_id obtained from the stash attribute details */
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u32 stash_id;
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struct pamu_stash_attribute dma_stash;
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u32 snoop_id;
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struct iommu_domain iommu_domain;
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spinlock_t domain_lock;
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};
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/* domain-device relationship */
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struct device_domain_info {
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struct list_head link; /* link to domain siblings */
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struct device *dev;
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u32 liodn;
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struct fsl_dma_domain *domain; /* pointer to domain */
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};
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#endif /* __FSL_PAMU_DOMAIN_H */
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