32 lines
1.0 KiB
Plaintext
32 lines
1.0 KiB
Plaintext
Analog Devices AD2S90 Resolver-to-Digital Converter
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https://www.analog.com/en/products/ad2s90.html
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Required properties:
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- compatible: should be "adi,ad2s90"
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- reg: SPI chip select number for the device
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- spi-max-frequency: set maximum clock frequency, must be 830000
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- spi-cpol and spi-cpha:
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Either SPI mode (0,0) or (1,1) must be used, so specify none or both of
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spi-cpha, spi-cpol.
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See for more details:
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Documentation/devicetree/bindings/spi/spi-bus.txt
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Note about max frequency:
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Chip's max frequency, as specified in its datasheet, is 2Mhz. But a 600ns
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delay is expected between the application of a logic LO to CS and the
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application of SCLK, as also specified. And since the delay is not
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implemented in the spi code, to satisfy it, SCLK's period should be at most
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2 * 600ns, so the max frequency should be 1 / (2 * 6e-7), which gives
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roughly 830000Hz.
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Example:
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resolver@0 {
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compatible = "adi,ad2s90";
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reg = <0>;
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spi-max-frequency = <830000>;
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spi-cpol;
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spi-cpha;
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};
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