..
Kconfig
fpga-manager: altera-ps-spi: Fix build error
2019-07-24 11:29:41 +02:00
Makefile
fpga manager: Adding FPGA Manager support for Xilinx zynqmp
2019-04-15 10:23:18 +02:00
altera-cvp.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 285
2019-06-05 17:36:37 +02:00
altera-fpga2sdram.c
fpga: bridge: add devm_fpga_bridge_create
2018-10-16 11:13:50 +02:00
altera-freeze-bridge.c
fpga: bridge: add devm_fpga_bridge_create
2018-10-16 11:13:50 +02:00
altera-hps2fpga.c
fpga: bridge: add devm_fpga_bridge_create
2018-10-16 11:13:50 +02:00
altera-pr-ip-core-plat.c
fpga: use SPDX
2018-05-25 18:23:56 +02:00
altera-pr-ip-core.c
fpga: mgr: add devm_fpga_mgr_create
2018-10-16 11:13:50 +02:00
altera-ps-spi.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422
2019-06-05 17:37:15 +02:00
dfl-afu-dma-region.c
mm: add account_locked_vm utility function
2019-07-16 19:23:25 -07:00
dfl-afu-main.c
fpga: dfl: afu: add DFL_FPGA_PORT_DMA_MAP/UNMAP ioctls support
2018-07-15 13:55:47 +02:00
dfl-afu-region.c
fpga: dfl: afu: add afu sub feature support
2018-07-15 13:55:47 +02:00
dfl-afu.h
fpga: dfl: afu: add DFL_FPGA_PORT_DMA_MAP/UNMAP ioctls support
2018-07-15 13:55:47 +02:00
dfl-fme-br.c
fpga: bridge: add devm_fpga_bridge_create
2018-10-16 11:13:50 +02:00
dfl-fme-main.c
fpga: dfl: fme: add partial reconfiguration sub feature support
2018-07-15 13:55:46 +02:00
dfl-fme-mgr.c
fpga: dfl-fme-mgr: fix FME_PR_INTFC_ID register address.
2019-07-03 19:58:58 +02:00
dfl-fme-pr.c
fpga: dfl: fme: align PR buffer size per PR datawidth
2019-07-03 19:58:59 +02:00
dfl-fme-pr.h
fpga: dfl: fme: add partial reconfiguration sub feature support
2018-07-15 13:55:46 +02:00
dfl-fme-region.c
fpga: dfl-fme-region: Use platform_get_drvdata()
2018-11-26 20:47:10 +01:00
dfl-fme.h
fpga: dfl: fme: add partial reconfiguration sub feature support
2018-07-15 13:55:46 +02:00
dfl-pci.c
fpga: dfl-pci: add enumeration for feature devices
2018-07-15 13:55:45 +02:00
dfl.c
fpga: dfl: expand minor range when registering chrdev region
2019-05-24 20:32:12 +02:00
dfl.h
fpga: dfl: add dfl_fpga_check_port_id function.
2018-07-15 13:55:45 +02:00
fpga-bridge.c
fpga: bridge: add devm_fpga_bridge_create
2018-10-16 11:13:50 +02:00
fpga-mgr.c
fpga: mgr: add devm_fpga_mgr_create
2018-10-16 11:13:50 +02:00
fpga-region.c
fpga: add devm_fpga_region_create
2018-10-16 11:13:50 +02:00
ice40-spi.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 441
2019-06-05 17:37:17 +02:00
machxo2-spi.c
fpga: mgr: add devm_fpga_mgr_create
2018-10-16 11:13:50 +02:00
of-fpga-region.c
drivers: Add generic helper to match by of_node
2019-06-24 05:22:31 +02:00
socfpga-a10.c
fpga: mgr: add devm_fpga_mgr_create
2018-10-16 11:13:50 +02:00
socfpga.c
fpga: mgr: add devm_fpga_mgr_create
2018-10-16 11:13:50 +02:00
stratix10-soc.c
fpga: stratix10-soc: fix use-after-free on s10_init()
2019-05-24 20:32:12 +02:00
ts73xx-fpga.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 285
2019-06-05 17:36:37 +02:00
xilinx-pr-decoupler.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 285
2019-06-05 17:36:37 +02:00
xilinx-spi.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422
2019-06-05 17:37:15 +02:00
zynq-fpga.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 285
2019-06-05 17:36:37 +02:00
zynqmp-fpga.c
fpga: zynqmp-fpga: Correctly handle error pointer
2019-05-30 07:56:11 -07:00