76 lines
2.0 KiB
C
76 lines
2.0 KiB
C
#ifndef __ASM_CRIS_SYSTEM_H
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#define __ASM_CRIS_SYSTEM_H
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#include <asm/arch/system.h>
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/* the switch_to macro calls resume, an asm function in entry.S which does the actual
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* task switching.
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*/
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extern struct task_struct *resume(struct task_struct *prev, struct task_struct *next, int);
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#define switch_to(prev,next,last) last = resume(prev,next, \
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(int)&((struct task_struct *)0)->thread)
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#define barrier() __asm__ __volatile__("": : :"memory")
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#define mb() barrier()
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#define rmb() mb()
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#define wmb() mb()
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#define read_barrier_depends() do { } while(0)
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#define set_mb(var, value) do { var = value; mb(); } while (0)
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#define set_wmb(var, value) do { var = value; wmb(); } while (0)
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#ifdef CONFIG_SMP
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#define smp_mb() mb()
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#define smp_rmb() rmb()
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#define smp_wmb() wmb()
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#define smp_read_barrier_depends() read_barrier_depends()
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#else
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#define smp_mb() barrier()
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#define smp_rmb() barrier()
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#define smp_wmb() barrier()
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#define smp_read_barrier_depends() do { } while(0)
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#endif
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#define iret()
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/*
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* disable hlt during certain critical i/o operations
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*/
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#define HAVE_DISABLE_HLT
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void disable_hlt(void);
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void enable_hlt(void);
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static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
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{
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/* since Etrax doesn't have any atomic xchg instructions, we need to disable
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irq's (if enabled) and do it with move.d's */
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unsigned long flags,temp;
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local_save_flags(flags); /* save flags, including irq enable bit */
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local_irq_disable(); /* shut off irq's */
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switch (size) {
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case 1:
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*((unsigned char *)&temp) = x;
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x = *(unsigned char *)ptr;
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*(unsigned char *)ptr = *((unsigned char *)&temp);
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break;
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case 2:
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*((unsigned short *)&temp) = x;
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x = *(unsigned short *)ptr;
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*(unsigned short *)ptr = *((unsigned short *)&temp);
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break;
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case 4:
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temp = x;
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x = *(unsigned long *)ptr;
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*(unsigned long *)ptr = temp;
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break;
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}
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local_irq_restore(flags); /* restore irq enable bit */
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return x;
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}
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#define arch_align_stack(x) (x)
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void default_idle(void);
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#endif
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