329 lines
9.1 KiB
C
329 lines
9.1 KiB
C
/*
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* PCI address cache; allows the lookup of PCI devices based on I/O address
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*
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* Copyright IBM Corporation 2004
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* Copyright Linas Vepstas <linas@austin.ibm.com> 2004
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/list.h>
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#include <linux/pci.h>
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#include <linux/rbtree.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/atomic.h>
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#include <asm/pci-bridge.h>
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#include <asm/debugfs.h>
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#include <asm/ppc-pci.h>
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/**
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* The pci address cache subsystem. This subsystem places
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* PCI device address resources into a red-black tree, sorted
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* according to the address range, so that given only an i/o
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* address, the corresponding PCI device can be **quickly**
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* found. It is safe to perform an address lookup in an interrupt
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* context; this ability is an important feature.
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*
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* Currently, the only customer of this code is the EEH subsystem;
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* thus, this code has been somewhat tailored to suit EEH better.
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* In particular, the cache does *not* hold the addresses of devices
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* for which EEH is not enabled.
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*
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* (Implementation Note: The RB tree seems to be better/faster
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* than any hash algo I could think of for this problem, even
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* with the penalty of slow pointer chases for d-cache misses).
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*/
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struct pci_io_addr_range {
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struct rb_node rb_node;
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resource_size_t addr_lo;
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resource_size_t addr_hi;
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struct eeh_dev *edev;
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struct pci_dev *pcidev;
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unsigned long flags;
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};
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static struct pci_io_addr_cache {
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struct rb_root rb_root;
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spinlock_t piar_lock;
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} pci_io_addr_cache_root;
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static inline struct eeh_dev *__eeh_addr_cache_get_device(unsigned long addr)
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{
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struct rb_node *n = pci_io_addr_cache_root.rb_root.rb_node;
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while (n) {
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struct pci_io_addr_range *piar;
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piar = rb_entry(n, struct pci_io_addr_range, rb_node);
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if (addr < piar->addr_lo)
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n = n->rb_left;
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else if (addr > piar->addr_hi)
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n = n->rb_right;
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else
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return piar->edev;
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}
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return NULL;
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}
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/**
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* eeh_addr_cache_get_dev - Get device, given only address
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* @addr: mmio (PIO) phys address or i/o port number
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*
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* Given an mmio phys address, or a port number, find a pci device
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* that implements this address. I/O port numbers are assumed to be offset
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* from zero (that is, they do *not* have pci_io_addr added in).
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* It is safe to call this function within an interrupt.
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*/
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struct eeh_dev *eeh_addr_cache_get_dev(unsigned long addr)
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{
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struct eeh_dev *edev;
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unsigned long flags;
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spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
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edev = __eeh_addr_cache_get_device(addr);
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spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
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return edev;
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}
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#ifdef DEBUG
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/*
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* Handy-dandy debug print routine, does nothing more
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* than print out the contents of our addr cache.
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*/
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static void eeh_addr_cache_print(struct pci_io_addr_cache *cache)
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{
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struct rb_node *n;
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int cnt = 0;
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n = rb_first(&cache->rb_root);
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while (n) {
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struct pci_io_addr_range *piar;
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piar = rb_entry(n, struct pci_io_addr_range, rb_node);
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pr_info("PCI: %s addr range %d [%pap-%pap]: %s\n",
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(piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt,
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&piar->addr_lo, &piar->addr_hi, pci_name(piar->pcidev));
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cnt++;
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n = rb_next(n);
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}
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}
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#endif
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/* Insert address range into the rb tree. */
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static struct pci_io_addr_range *
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eeh_addr_cache_insert(struct pci_dev *dev, resource_size_t alo,
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resource_size_t ahi, unsigned long flags)
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{
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struct rb_node **p = &pci_io_addr_cache_root.rb_root.rb_node;
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struct rb_node *parent = NULL;
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struct pci_io_addr_range *piar;
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/* Walk tree, find a place to insert into tree */
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while (*p) {
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parent = *p;
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piar = rb_entry(parent, struct pci_io_addr_range, rb_node);
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if (ahi < piar->addr_lo) {
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p = &parent->rb_left;
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} else if (alo > piar->addr_hi) {
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p = &parent->rb_right;
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} else {
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if (dev != piar->pcidev ||
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alo != piar->addr_lo || ahi != piar->addr_hi) {
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pr_warn("PIAR: overlapping address range\n");
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}
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return piar;
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}
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}
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piar = kzalloc(sizeof(struct pci_io_addr_range), GFP_ATOMIC);
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if (!piar)
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return NULL;
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piar->addr_lo = alo;
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piar->addr_hi = ahi;
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piar->edev = pci_dev_to_eeh_dev(dev);
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piar->pcidev = dev;
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piar->flags = flags;
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pr_debug("PIAR: insert range=[%pap:%pap] dev=%s\n",
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&alo, &ahi, pci_name(dev));
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rb_link_node(&piar->rb_node, parent, p);
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rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root);
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return piar;
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}
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static void __eeh_addr_cache_insert_dev(struct pci_dev *dev)
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{
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struct pci_dn *pdn;
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struct eeh_dev *edev;
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int i;
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pdn = pci_get_pdn_by_devfn(dev->bus, dev->devfn);
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if (!pdn) {
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pr_warn("PCI: no pci dn found for dev=%s\n",
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pci_name(dev));
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return;
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}
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edev = pdn_to_eeh_dev(pdn);
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if (!edev) {
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pr_warn("PCI: no EEH dev found for %s\n",
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pci_name(dev));
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return;
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}
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/* Skip any devices for which EEH is not enabled. */
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if (!edev->pe) {
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dev_dbg(&dev->dev, "EEH: Skip building address cache\n");
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return;
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}
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/*
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* Walk resources on this device, poke the first 7 (6 normal BAR and 1
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* ROM BAR) into the tree.
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*/
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for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
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resource_size_t start = pci_resource_start(dev,i);
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resource_size_t end = pci_resource_end(dev,i);
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unsigned long flags = pci_resource_flags(dev,i);
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/* We are interested only bus addresses, not dma or other stuff */
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if (0 == (flags & (IORESOURCE_IO | IORESOURCE_MEM)))
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continue;
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if (start == 0 || ~start == 0 || end == 0 || ~end == 0)
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continue;
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eeh_addr_cache_insert(dev, start, end, flags);
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}
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}
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/**
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* eeh_addr_cache_insert_dev - Add a device to the address cache
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* @dev: PCI device whose I/O addresses we are interested in.
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*
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* In order to support the fast lookup of devices based on addresses,
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* we maintain a cache of devices that can be quickly searched.
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* This routine adds a device to that cache.
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*/
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void eeh_addr_cache_insert_dev(struct pci_dev *dev)
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{
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unsigned long flags;
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spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
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__eeh_addr_cache_insert_dev(dev);
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spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
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}
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static inline void __eeh_addr_cache_rmv_dev(struct pci_dev *dev)
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{
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struct rb_node *n;
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restart:
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n = rb_first(&pci_io_addr_cache_root.rb_root);
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while (n) {
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struct pci_io_addr_range *piar;
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piar = rb_entry(n, struct pci_io_addr_range, rb_node);
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if (piar->pcidev == dev) {
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pr_debug("PIAR: remove range=[%pap:%pap] dev=%s\n",
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&piar->addr_lo, &piar->addr_hi, pci_name(dev));
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rb_erase(n, &pci_io_addr_cache_root.rb_root);
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kfree(piar);
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goto restart;
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}
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n = rb_next(n);
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}
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}
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/**
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* eeh_addr_cache_rmv_dev - remove pci device from addr cache
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* @dev: device to remove
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*
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* Remove a device from the addr-cache tree.
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* This is potentially expensive, since it will walk
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* the tree multiple times (once per resource).
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* But so what; device removal doesn't need to be that fast.
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*/
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void eeh_addr_cache_rmv_dev(struct pci_dev *dev)
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{
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unsigned long flags;
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spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
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__eeh_addr_cache_rmv_dev(dev);
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spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
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}
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/**
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* eeh_addr_cache_build - Build a cache of I/O addresses
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*
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* Build a cache of pci i/o addresses. This cache will be used to
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* find the pci device that corresponds to a given address.
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* This routine scans all pci busses to build the cache.
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* Must be run late in boot process, after the pci controllers
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* have been scanned for devices (after all device resources are known).
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*/
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void eeh_addr_cache_build(void)
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{
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struct pci_dn *pdn;
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struct eeh_dev *edev;
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struct pci_dev *dev = NULL;
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spin_lock_init(&pci_io_addr_cache_root.piar_lock);
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for_each_pci_dev(dev) {
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pdn = pci_get_pdn_by_devfn(dev->bus, dev->devfn);
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if (!pdn)
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continue;
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edev = pdn_to_eeh_dev(pdn);
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if (!edev)
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continue;
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dev->dev.archdata.edev = edev;
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edev->pdev = dev;
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eeh_addr_cache_insert_dev(dev);
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eeh_sysfs_add_device(dev);
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}
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}
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static int eeh_addr_cache_show(struct seq_file *s, void *v)
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{
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struct pci_io_addr_range *piar;
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struct rb_node *n;
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spin_lock(&pci_io_addr_cache_root.piar_lock);
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for (n = rb_first(&pci_io_addr_cache_root.rb_root); n; n = rb_next(n)) {
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piar = rb_entry(n, struct pci_io_addr_range, rb_node);
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seq_printf(s, "%s addr range [%pap-%pap]: %s\n",
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(piar->flags & IORESOURCE_IO) ? "i/o" : "mem",
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&piar->addr_lo, &piar->addr_hi, pci_name(piar->pcidev));
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}
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spin_unlock(&pci_io_addr_cache_root.piar_lock);
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return 0;
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}
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DEFINE_SHOW_ATTRIBUTE(eeh_addr_cache);
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void eeh_cache_debugfs_init(void)
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{
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debugfs_create_file_unsafe("eeh_address_cache", 0400,
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powerpc_debugfs_root, NULL,
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&eeh_addr_cache_fops);
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}
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