35 lines
1.2 KiB
C
35 lines
1.2 KiB
C
#ifndef _X8664_CACHEFLUSH_H
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#define _X8664_CACHEFLUSH_H
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/* Keep includes the same across arches. */
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#include <linux/mm.h>
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/* Caches aren't brain-dead on the intel. */
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#define flush_cache_all() do { } while (0)
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#define flush_cache_mm(mm) do { } while (0)
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#define flush_cache_range(vma, start, end) do { } while (0)
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#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
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#define flush_dcache_page(page) do { } while (0)
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#define flush_dcache_mmap_lock(mapping) do { } while (0)
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#define flush_dcache_mmap_unlock(mapping) do { } while (0)
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#define flush_icache_range(start, end) do { } while (0)
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#define flush_icache_page(vma,pg) do { } while (0)
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#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
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#define flush_cache_vmap(start, end) do { } while (0)
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#define flush_cache_vunmap(start, end) do { } while (0)
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#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
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memcpy(dst, src, len)
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#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
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memcpy(dst, src, len)
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void global_flush_tlb(void);
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int change_page_attr(struct page *page, int numpages, pgprot_t prot);
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int change_page_attr_addr(unsigned long addr, int numpages, pgprot_t prot);
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#ifdef CONFIG_DEBUG_RODATA
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void mark_rodata_ro(void);
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#endif
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#endif /* _X8664_CACHEFLUSH_H */
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