139 lines
3.5 KiB
C
139 lines
3.5 KiB
C
/*
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* drivers/net/phy/cicada.c
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*
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* Driver for Cicada PHYs
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*
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* Author: Andy Fleming
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*
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* Copyright (c) 2004 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/errno.h>
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#include <linux/unistd.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/spinlock.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/mii.h>
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#include <linux/ethtool.h>
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#include <linux/phy.h>
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#include <linux/io.h>
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#include <asm/irq.h>
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#include <linux/uaccess.h>
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/* Cicada Extended Control Register 1 */
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#define MII_CIS8201_EXT_CON1 0x17
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#define MII_CIS8201_EXTCON1_INIT 0x0000
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/* Cicada Interrupt Mask Register */
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#define MII_CIS8201_IMASK 0x19
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#define MII_CIS8201_IMASK_IEN 0x8000
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#define MII_CIS8201_IMASK_SPEED 0x4000
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#define MII_CIS8201_IMASK_LINK 0x2000
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#define MII_CIS8201_IMASK_DUPLEX 0x1000
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#define MII_CIS8201_IMASK_MASK 0xf000
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/* Cicada Interrupt Status Register */
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#define MII_CIS8201_ISTAT 0x1a
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#define MII_CIS8201_ISTAT_STATUS 0x8000
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#define MII_CIS8201_ISTAT_SPEED 0x4000
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#define MII_CIS8201_ISTAT_LINK 0x2000
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#define MII_CIS8201_ISTAT_DUPLEX 0x1000
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/* Cicada Auxiliary Control/Status Register */
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#define MII_CIS8201_AUX_CONSTAT 0x1c
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#define MII_CIS8201_AUXCONSTAT_INIT 0x0004
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#define MII_CIS8201_AUXCONSTAT_DUPLEX 0x0020
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#define MII_CIS8201_AUXCONSTAT_SPEED 0x0018
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#define MII_CIS8201_AUXCONSTAT_GBIT 0x0010
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#define MII_CIS8201_AUXCONSTAT_100 0x0008
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MODULE_DESCRIPTION("Cicadia PHY driver");
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MODULE_AUTHOR("Andy Fleming");
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MODULE_LICENSE("GPL");
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static int cis820x_config_init(struct phy_device *phydev)
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{
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int err;
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err = phy_write(phydev, MII_CIS8201_AUX_CONSTAT,
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MII_CIS8201_AUXCONSTAT_INIT);
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if (err < 0)
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return err;
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err = phy_write(phydev, MII_CIS8201_EXT_CON1,
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MII_CIS8201_EXTCON1_INIT);
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return err;
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}
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static int cis820x_ack_interrupt(struct phy_device *phydev)
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{
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int err = phy_read(phydev, MII_CIS8201_ISTAT);
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return (err < 0) ? err : 0;
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}
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static int cis820x_config_intr(struct phy_device *phydev)
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{
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int err;
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if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
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err = phy_write(phydev, MII_CIS8201_IMASK,
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MII_CIS8201_IMASK_MASK);
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else
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err = phy_write(phydev, MII_CIS8201_IMASK, 0);
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return err;
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}
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/* Cicada 8201, a.k.a Vitesse VSC8201 */
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static struct phy_driver cis820x_driver[] = {
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{
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.phy_id = 0x000fc410,
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.name = "Cicada Cis8201",
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.phy_id_mask = 0x000ffff0,
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.features = PHY_GBIT_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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.config_init = &cis820x_config_init,
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.config_aneg = &genphy_config_aneg,
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.read_status = &genphy_read_status,
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.ack_interrupt = &cis820x_ack_interrupt,
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.config_intr = &cis820x_config_intr,
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}, {
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.phy_id = 0x000fc440,
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.name = "Cicada Cis8204",
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.phy_id_mask = 0x000fffc0,
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.features = PHY_GBIT_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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.config_init = &cis820x_config_init,
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.config_aneg = &genphy_config_aneg,
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.read_status = &genphy_read_status,
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.ack_interrupt = &cis820x_ack_interrupt,
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.config_intr = &cis820x_config_intr,
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} };
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module_phy_driver(cis820x_driver);
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static struct mdio_device_id __maybe_unused cicada_tbl[] = {
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{ 0x000fc410, 0x000ffff0 },
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{ 0x000fc440, 0x000fffc0 },
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{ }
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};
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MODULE_DEVICE_TABLE(mdio, cicada_tbl);
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