6a29beef9d
According to xHCI spec Figure 30: Interrupt Throttle Flow Diagram If PCI Message Signaled Interrupts (MSI or MSI-X) are enabled, then the assertion of the Interrupt Pending (IP) flag in Figure 30 generates a PCI Dword write. The IP flag is automatically cleared by the completion of the PCI write. the MSI enabled HCs don't need to clear interrupt pending bit, but hcd->irq = 0 doesn't equal to MSI enabled HCD. At some Dual-role controller software designs, it sets hcd->irq as 0 to avoid HCD requesting interrupt, and they want to decide when to call usb_hcd_irq by software. Signed-off-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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.. | ||
association.h | ||
atmel_usba_udc.h | ||
audio-v2.h | ||
audio.h | ||
c67x00.h | ||
cdc-wdm.h | ||
cdc.h | ||
cdc_ncm.h | ||
ch9.h | ||
chipidea.h | ||
composite.h | ||
ehci-dbgp.h | ||
ehci_def.h | ||
ehci_pdriver.h | ||
ezusb.h | ||
functionfs.h | ||
g_hid.h | ||
gadget.h | ||
gadget_configfs.h | ||
gpio_vbus.h | ||
hcd.h | ||
input.h | ||
iowarrior.h | ||
irda.h | ||
isp116x.h | ||
isp1301.h | ||
isp1362.h | ||
isp1760.h | ||
m66592.h | ||
msm_hsusb_hw.h | ||
musb-ux500.h | ||
musb.h | ||
net2280.h | ||
of.h | ||
ohci_pdriver.h | ||
otg-fsm.h | ||
otg.h | ||
phy.h | ||
phy_companion.h | ||
quirks.h | ||
r8a66597.h | ||
renesas_usbhs.h | ||
rndis_host.h | ||
samsung_usb_phy.h | ||
serial.h | ||
sl811.h | ||
storage.h | ||
tegra_usb_phy.h | ||
tilegx.h | ||
typec.h | ||
uas.h | ||
ulpi.h | ||
usb338x.h | ||
usb_phy_generic.h | ||
usbnet.h | ||
wusb-wa.h | ||
wusb.h | ||
xhci-dbgp.h |