264 lines
7.7 KiB
C
264 lines
7.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* This file provides wrappers with sanitizer instrumentation for bit
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* operations.
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*
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* To use this functionality, an arch's bitops.h file needs to define each of
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* the below bit operations with an arch_ prefix (e.g. arch_set_bit(),
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* arch___set_bit(), etc.).
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*/
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#ifndef _ASM_GENERIC_BITOPS_INSTRUMENTED_H
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#define _ASM_GENERIC_BITOPS_INSTRUMENTED_H
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#include <linux/kasan-checks.h>
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/**
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* set_bit - Atomically set a bit in memory
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* @nr: the bit to set
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* @addr: the address to start counting from
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*
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* This is a relaxed atomic operation (no implied memory barriers).
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*
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* Note that @nr may be almost arbitrarily large; this function is not
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* restricted to acting on a single-word quantity.
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*/
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static inline void set_bit(long nr, volatile unsigned long *addr)
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{
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kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
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arch_set_bit(nr, addr);
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}
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/**
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* __set_bit - Set a bit in memory
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* @nr: the bit to set
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* @addr: the address to start counting from
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*
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* Unlike set_bit(), this function is non-atomic. If it is called on the same
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* region of memory concurrently, the effect may be that only one operation
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* succeeds.
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*/
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static inline void __set_bit(long nr, volatile unsigned long *addr)
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{
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kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
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arch___set_bit(nr, addr);
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}
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/**
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* clear_bit - Clears a bit in memory
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* @nr: Bit to clear
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* @addr: Address to start counting from
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*
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* This is a relaxed atomic operation (no implied memory barriers).
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*/
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static inline void clear_bit(long nr, volatile unsigned long *addr)
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{
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kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
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arch_clear_bit(nr, addr);
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}
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/**
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* __clear_bit - Clears a bit in memory
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* @nr: the bit to clear
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* @addr: the address to start counting from
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*
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* Unlike clear_bit(), this function is non-atomic. If it is called on the same
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* region of memory concurrently, the effect may be that only one operation
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* succeeds.
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*/
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static inline void __clear_bit(long nr, volatile unsigned long *addr)
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{
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kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
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arch___clear_bit(nr, addr);
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}
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/**
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* clear_bit_unlock - Clear a bit in memory, for unlock
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* @nr: the bit to set
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* @addr: the address to start counting from
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*
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* This operation is atomic and provides release barrier semantics.
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*/
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static inline void clear_bit_unlock(long nr, volatile unsigned long *addr)
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{
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kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
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arch_clear_bit_unlock(nr, addr);
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}
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/**
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* __clear_bit_unlock - Clears a bit in memory
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* @nr: Bit to clear
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* @addr: Address to start counting from
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*
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* This is a non-atomic operation but implies a release barrier before the
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* memory operation. It can be used for an unlock if no other CPUs can
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* concurrently modify other bits in the word.
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*/
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static inline void __clear_bit_unlock(long nr, volatile unsigned long *addr)
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{
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kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
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arch___clear_bit_unlock(nr, addr);
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}
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/**
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* change_bit - Toggle a bit in memory
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* @nr: Bit to change
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* @addr: Address to start counting from
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*
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* This is a relaxed atomic operation (no implied memory barriers).
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*
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* Note that @nr may be almost arbitrarily large; this function is not
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* restricted to acting on a single-word quantity.
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*/
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static inline void change_bit(long nr, volatile unsigned long *addr)
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{
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kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
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arch_change_bit(nr, addr);
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}
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/**
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* __change_bit - Toggle a bit in memory
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* @nr: the bit to change
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* @addr: the address to start counting from
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*
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* Unlike change_bit(), this function is non-atomic. If it is called on the same
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* region of memory concurrently, the effect may be that only one operation
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* succeeds.
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*/
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static inline void __change_bit(long nr, volatile unsigned long *addr)
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{
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kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
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arch___change_bit(nr, addr);
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}
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/**
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* test_and_set_bit - Set a bit and return its old value
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This is an atomic fully-ordered operation (implied full memory barrier).
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*/
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static inline bool test_and_set_bit(long nr, volatile unsigned long *addr)
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{
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kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
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return arch_test_and_set_bit(nr, addr);
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}
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/**
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* __test_and_set_bit - Set a bit and return its old value
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation is non-atomic. If two instances of this operation race, one
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* can appear to succeed but actually fail.
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*/
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static inline bool __test_and_set_bit(long nr, volatile unsigned long *addr)
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{
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kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
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return arch___test_and_set_bit(nr, addr);
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}
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/**
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* test_and_set_bit_lock - Set a bit and return its old value, for lock
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation is atomic and provides acquire barrier semantics if
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* the returned value is 0.
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* It can be used to implement bit locks.
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*/
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static inline bool test_and_set_bit_lock(long nr, volatile unsigned long *addr)
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{
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kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
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return arch_test_and_set_bit_lock(nr, addr);
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}
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/**
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* test_and_clear_bit - Clear a bit and return its old value
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* @nr: Bit to clear
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* @addr: Address to count from
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*
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* This is an atomic fully-ordered operation (implied full memory barrier).
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*/
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static inline bool test_and_clear_bit(long nr, volatile unsigned long *addr)
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{
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kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
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return arch_test_and_clear_bit(nr, addr);
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}
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/**
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* __test_and_clear_bit - Clear a bit and return its old value
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* @nr: Bit to clear
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* @addr: Address to count from
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*
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* This operation is non-atomic. If two instances of this operation race, one
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* can appear to succeed but actually fail.
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*/
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static inline bool __test_and_clear_bit(long nr, volatile unsigned long *addr)
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{
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kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
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return arch___test_and_clear_bit(nr, addr);
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}
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/**
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* test_and_change_bit - Change a bit and return its old value
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* @nr: Bit to change
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* @addr: Address to count from
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*
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* This is an atomic fully-ordered operation (implied full memory barrier).
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*/
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static inline bool test_and_change_bit(long nr, volatile unsigned long *addr)
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{
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kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
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return arch_test_and_change_bit(nr, addr);
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}
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/**
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* __test_and_change_bit - Change a bit and return its old value
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* @nr: Bit to change
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* @addr: Address to count from
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*
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* This operation is non-atomic. If two instances of this operation race, one
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* can appear to succeed but actually fail.
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*/
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static inline bool __test_and_change_bit(long nr, volatile unsigned long *addr)
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{
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kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
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return arch___test_and_change_bit(nr, addr);
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}
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/**
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* test_bit - Determine whether a bit is set
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* @nr: bit number to test
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* @addr: Address to start counting from
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*/
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static inline bool test_bit(long nr, const volatile unsigned long *addr)
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{
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kasan_check_read(addr + BIT_WORD(nr), sizeof(long));
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return arch_test_bit(nr, addr);
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}
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#if defined(arch_clear_bit_unlock_is_negative_byte)
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/**
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* clear_bit_unlock_is_negative_byte - Clear a bit in memory and test if bottom
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* byte is negative, for unlock.
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* @nr: the bit to clear
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* @addr: the address to start counting from
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*
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* This operation is atomic and provides release barrier semantics.
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*
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* This is a bit of a one-trick-pony for the filemap code, which clears
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* PG_locked and tests PG_waiters,
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*/
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static inline bool
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clear_bit_unlock_is_negative_byte(long nr, volatile unsigned long *addr)
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{
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kasan_check_write(addr + BIT_WORD(nr), sizeof(long));
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return arch_clear_bit_unlock_is_negative_byte(nr, addr);
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}
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/* Let everybody know we have it. */
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#define clear_bit_unlock_is_negative_byte clear_bit_unlock_is_negative_byte
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#endif
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#endif /* _ASM_GENERIC_BITOPS_INSTRUMENTED_H */
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