336 lines
7.2 KiB
C
336 lines
7.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Atheros AR71XX/AR724X/AR913X built-in hardware watchdog timer.
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*
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* Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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* This driver was based on: drivers/watchdog/ixp4xx_wdt.c
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* Author: Deepak Saxena <dsaxena@plexity.net>
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* Copyright 2004 (c) MontaVista, Software, Inc.
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*
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* which again was based on sa1100 driver,
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* Copyright (C) 2000 Oleg Drokin <green@crimea.edu>
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/bitops.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/fs.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/miscdevice.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/platform_device.h>
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#include <linux/types.h>
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#include <linux/watchdog.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/uaccess.h>
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#define DRIVER_NAME "ath79-wdt"
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#define WDT_TIMEOUT 15 /* seconds */
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#define WDOG_REG_CTRL 0x00
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#define WDOG_REG_TIMER 0x04
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#define WDOG_CTRL_LAST_RESET BIT(31)
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#define WDOG_CTRL_ACTION_MASK 3
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#define WDOG_CTRL_ACTION_NONE 0 /* no action */
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#define WDOG_CTRL_ACTION_GPI 1 /* general purpose interrupt */
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#define WDOG_CTRL_ACTION_NMI 2 /* NMI */
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#define WDOG_CTRL_ACTION_FCR 3 /* full chip reset */
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
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"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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static int timeout = WDT_TIMEOUT;
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module_param(timeout, int, 0);
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MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds "
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"(default=" __MODULE_STRING(WDT_TIMEOUT) "s)");
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static unsigned long wdt_flags;
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#define WDT_FLAGS_BUSY 0
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#define WDT_FLAGS_EXPECT_CLOSE 1
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static struct clk *wdt_clk;
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static unsigned long wdt_freq;
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static int boot_status;
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static int max_timeout;
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static void __iomem *wdt_base;
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static inline void ath79_wdt_wr(unsigned reg, u32 val)
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{
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iowrite32(val, wdt_base + reg);
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}
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static inline u32 ath79_wdt_rr(unsigned reg)
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{
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return ioread32(wdt_base + reg);
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}
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static inline void ath79_wdt_keepalive(void)
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{
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ath79_wdt_wr(WDOG_REG_TIMER, wdt_freq * timeout);
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/* flush write */
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ath79_wdt_rr(WDOG_REG_TIMER);
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}
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static inline void ath79_wdt_enable(void)
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{
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ath79_wdt_keepalive();
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/*
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* Updating the TIMER register requires a few microseconds
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* on the AR934x SoCs at least. Use a small delay to ensure
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* that the TIMER register is updated within the hardware
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* before enabling the watchdog.
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*/
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udelay(2);
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ath79_wdt_wr(WDOG_REG_CTRL, WDOG_CTRL_ACTION_FCR);
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/* flush write */
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ath79_wdt_rr(WDOG_REG_CTRL);
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}
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static inline void ath79_wdt_disable(void)
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{
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ath79_wdt_wr(WDOG_REG_CTRL, WDOG_CTRL_ACTION_NONE);
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/* flush write */
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ath79_wdt_rr(WDOG_REG_CTRL);
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}
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static int ath79_wdt_set_timeout(int val)
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{
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if (val < 1 || val > max_timeout)
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return -EINVAL;
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timeout = val;
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ath79_wdt_keepalive();
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return 0;
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}
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static int ath79_wdt_open(struct inode *inode, struct file *file)
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{
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if (test_and_set_bit(WDT_FLAGS_BUSY, &wdt_flags))
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return -EBUSY;
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clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
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ath79_wdt_enable();
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return stream_open(inode, file);
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}
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static int ath79_wdt_release(struct inode *inode, struct file *file)
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{
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if (test_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags))
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ath79_wdt_disable();
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else {
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pr_crit("device closed unexpectedly, watchdog timer will not stop!\n");
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ath79_wdt_keepalive();
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}
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clear_bit(WDT_FLAGS_BUSY, &wdt_flags);
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clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
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return 0;
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}
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static ssize_t ath79_wdt_write(struct file *file, const char *data,
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size_t len, loff_t *ppos)
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{
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if (len) {
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if (!nowayout) {
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size_t i;
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clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
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for (i = 0; i != len; i++) {
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char c;
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if (get_user(c, data + i))
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return -EFAULT;
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if (c == 'V')
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set_bit(WDT_FLAGS_EXPECT_CLOSE,
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&wdt_flags);
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}
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}
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ath79_wdt_keepalive();
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}
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return len;
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}
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static const struct watchdog_info ath79_wdt_info = {
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
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WDIOF_MAGICCLOSE | WDIOF_CARDRESET,
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.firmware_version = 0,
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.identity = "ATH79 watchdog",
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};
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static long ath79_wdt_ioctl(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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void __user *argp = (void __user *)arg;
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int __user *p = argp;
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int err;
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int t;
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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err = copy_to_user(argp, &ath79_wdt_info,
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sizeof(ath79_wdt_info)) ? -EFAULT : 0;
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break;
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case WDIOC_GETSTATUS:
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err = put_user(0, p);
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break;
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case WDIOC_GETBOOTSTATUS:
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err = put_user(boot_status, p);
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break;
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case WDIOC_KEEPALIVE:
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ath79_wdt_keepalive();
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err = 0;
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break;
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case WDIOC_SETTIMEOUT:
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err = get_user(t, p);
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if (err)
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break;
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err = ath79_wdt_set_timeout(t);
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if (err)
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break;
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fallthrough;
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case WDIOC_GETTIMEOUT:
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err = put_user(timeout, p);
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break;
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default:
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err = -ENOTTY;
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break;
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}
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return err;
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}
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static const struct file_operations ath79_wdt_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = ath79_wdt_write,
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.unlocked_ioctl = ath79_wdt_ioctl,
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.compat_ioctl = compat_ptr_ioctl,
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.open = ath79_wdt_open,
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.release = ath79_wdt_release,
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};
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static struct miscdevice ath79_wdt_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &ath79_wdt_fops,
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};
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static int ath79_wdt_probe(struct platform_device *pdev)
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{
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u32 ctrl;
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int err;
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if (wdt_base)
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return -EBUSY;
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wdt_base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(wdt_base))
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return PTR_ERR(wdt_base);
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wdt_clk = devm_clk_get(&pdev->dev, "wdt");
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if (IS_ERR(wdt_clk))
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return PTR_ERR(wdt_clk);
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err = clk_prepare_enable(wdt_clk);
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if (err)
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return err;
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wdt_freq = clk_get_rate(wdt_clk);
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if (!wdt_freq) {
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err = -EINVAL;
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goto err_clk_disable;
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}
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max_timeout = (0xfffffffful / wdt_freq);
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if (timeout < 1 || timeout > max_timeout) {
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timeout = max_timeout;
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dev_info(&pdev->dev,
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"timeout value must be 0 < timeout < %d, using %d\n",
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max_timeout, timeout);
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}
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ctrl = ath79_wdt_rr(WDOG_REG_CTRL);
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boot_status = (ctrl & WDOG_CTRL_LAST_RESET) ? WDIOF_CARDRESET : 0;
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err = misc_register(&ath79_wdt_miscdev);
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if (err) {
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dev_err(&pdev->dev,
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"unable to register misc device, err=%d\n", err);
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goto err_clk_disable;
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}
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return 0;
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err_clk_disable:
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clk_disable_unprepare(wdt_clk);
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return err;
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}
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static int ath79_wdt_remove(struct platform_device *pdev)
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{
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misc_deregister(&ath79_wdt_miscdev);
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clk_disable_unprepare(wdt_clk);
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return 0;
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}
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static void ath79_wdt_shutdown(struct platform_device *pdev)
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{
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ath79_wdt_disable();
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}
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#ifdef CONFIG_OF
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static const struct of_device_id ath79_wdt_match[] = {
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{ .compatible = "qca,ar7130-wdt" },
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{},
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};
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MODULE_DEVICE_TABLE(of, ath79_wdt_match);
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#endif
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static struct platform_driver ath79_wdt_driver = {
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.probe = ath79_wdt_probe,
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.remove = ath79_wdt_remove,
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.shutdown = ath79_wdt_shutdown,
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.driver = {
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.name = DRIVER_NAME,
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.of_match_table = of_match_ptr(ath79_wdt_match),
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},
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};
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module_platform_driver(ath79_wdt_driver);
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MODULE_DESCRIPTION("Atheros AR71XX/AR724X/AR913X hardware watchdog driver");
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MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org");
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MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:" DRIVER_NAME);
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