742 lines
18 KiB
C
742 lines
18 KiB
C
/*
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* OMAP mailbox driver
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*
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* Copyright (C) 2006-2009 Nokia Corporation. All rights reserved.
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* Copyright (C) 2013-2014 Texas Instruments Inc.
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*
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* Contact: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
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* Suman Anna <s-anna@ti.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#include <linux/interrupt.h>
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#include <linux/spinlock.h>
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#include <linux/mutex.h>
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#include <linux/slab.h>
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#include <linux/kfifo.h>
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#include <linux/err.h>
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#include <linux/notifier.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/platform_data/mailbox-omap.h>
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#include <linux/omap-mailbox.h>
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#define MAILBOX_REVISION 0x000
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#define MAILBOX_MESSAGE(m) (0x040 + 4 * (m))
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#define MAILBOX_FIFOSTATUS(m) (0x080 + 4 * (m))
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#define MAILBOX_MSGSTATUS(m) (0x0c0 + 4 * (m))
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#define OMAP2_MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u))
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#define OMAP2_MAILBOX_IRQENABLE(u) (0x104 + 8 * (u))
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#define OMAP4_MAILBOX_IRQSTATUS(u) (0x104 + 0x10 * (u))
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#define OMAP4_MAILBOX_IRQENABLE(u) (0x108 + 0x10 * (u))
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#define OMAP4_MAILBOX_IRQENABLE_CLR(u) (0x10c + 0x10 * (u))
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#define MAILBOX_IRQSTATUS(type, u) (type ? OMAP4_MAILBOX_IRQSTATUS(u) : \
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OMAP2_MAILBOX_IRQSTATUS(u))
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#define MAILBOX_IRQENABLE(type, u) (type ? OMAP4_MAILBOX_IRQENABLE(u) : \
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OMAP2_MAILBOX_IRQENABLE(u))
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#define MAILBOX_IRQDISABLE(type, u) (type ? OMAP4_MAILBOX_IRQENABLE_CLR(u) \
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: OMAP2_MAILBOX_IRQENABLE(u))
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#define MAILBOX_IRQ_NEWMSG(m) (1 << (2 * (m)))
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#define MAILBOX_IRQ_NOTFULL(m) (1 << (2 * (m) + 1))
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#define MBOX_REG_SIZE 0x120
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#define OMAP4_MBOX_REG_SIZE 0x130
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#define MBOX_NR_REGS (MBOX_REG_SIZE / sizeof(u32))
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#define OMAP4_MBOX_NR_REGS (OMAP4_MBOX_REG_SIZE / sizeof(u32))
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struct omap_mbox_fifo {
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unsigned long msg;
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unsigned long fifo_stat;
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unsigned long msg_stat;
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unsigned long irqenable;
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unsigned long irqstatus;
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unsigned long irqdisable;
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u32 intr_bit;
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};
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struct omap_mbox_queue {
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spinlock_t lock;
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struct kfifo fifo;
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struct work_struct work;
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struct tasklet_struct tasklet;
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struct omap_mbox *mbox;
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bool full;
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};
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struct omap_mbox_device {
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struct device *dev;
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struct mutex cfg_lock;
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void __iomem *mbox_base;
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u32 num_users;
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u32 num_fifos;
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struct omap_mbox **mboxes;
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struct list_head elem;
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};
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struct omap_mbox {
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const char *name;
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int irq;
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struct omap_mbox_queue *txq, *rxq;
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struct device *dev;
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struct omap_mbox_device *parent;
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struct omap_mbox_fifo tx_fifo;
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struct omap_mbox_fifo rx_fifo;
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u32 ctx[OMAP4_MBOX_NR_REGS];
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u32 intr_type;
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int use_count;
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struct blocking_notifier_head notifier;
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};
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/* global variables for the mailbox devices */
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static DEFINE_MUTEX(omap_mbox_devices_lock);
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static LIST_HEAD(omap_mbox_devices);
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static unsigned int mbox_kfifo_size = CONFIG_OMAP_MBOX_KFIFO_SIZE;
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module_param(mbox_kfifo_size, uint, S_IRUGO);
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MODULE_PARM_DESC(mbox_kfifo_size, "Size of omap's mailbox kfifo (bytes)");
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static inline
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unsigned int mbox_read_reg(struct omap_mbox_device *mdev, size_t ofs)
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{
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return __raw_readl(mdev->mbox_base + ofs);
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}
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static inline
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void mbox_write_reg(struct omap_mbox_device *mdev, u32 val, size_t ofs)
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{
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__raw_writel(val, mdev->mbox_base + ofs);
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}
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/* Mailbox FIFO handle functions */
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static mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox)
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{
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struct omap_mbox_fifo *fifo = &mbox->rx_fifo;
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return (mbox_msg_t) mbox_read_reg(mbox->parent, fifo->msg);
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}
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static void mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
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{
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struct omap_mbox_fifo *fifo = &mbox->tx_fifo;
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mbox_write_reg(mbox->parent, msg, fifo->msg);
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}
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static int mbox_fifo_empty(struct omap_mbox *mbox)
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{
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struct omap_mbox_fifo *fifo = &mbox->rx_fifo;
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return (mbox_read_reg(mbox->parent, fifo->msg_stat) == 0);
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}
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static int mbox_fifo_full(struct omap_mbox *mbox)
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{
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struct omap_mbox_fifo *fifo = &mbox->tx_fifo;
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return mbox_read_reg(mbox->parent, fifo->fifo_stat);
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}
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/* Mailbox IRQ handle functions */
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static void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
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{
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struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
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&mbox->tx_fifo : &mbox->rx_fifo;
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u32 bit = fifo->intr_bit;
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u32 irqstatus = fifo->irqstatus;
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mbox_write_reg(mbox->parent, bit, irqstatus);
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/* Flush posted write for irq status to avoid spurious interrupts */
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mbox_read_reg(mbox->parent, irqstatus);
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}
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static int is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
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{
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struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
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&mbox->tx_fifo : &mbox->rx_fifo;
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u32 bit = fifo->intr_bit;
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u32 irqenable = fifo->irqenable;
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u32 irqstatus = fifo->irqstatus;
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u32 enable = mbox_read_reg(mbox->parent, irqenable);
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u32 status = mbox_read_reg(mbox->parent, irqstatus);
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return (int)(enable & status & bit);
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}
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/*
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* message sender
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*/
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int omap_mbox_msg_send(struct omap_mbox *mbox, mbox_msg_t msg)
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{
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struct omap_mbox_queue *mq = mbox->txq;
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int ret = 0, len;
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spin_lock_bh(&mq->lock);
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if (kfifo_avail(&mq->fifo) < sizeof(msg)) {
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ret = -ENOMEM;
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goto out;
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}
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if (kfifo_is_empty(&mq->fifo) && !mbox_fifo_full(mbox)) {
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mbox_fifo_write(mbox, msg);
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goto out;
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}
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len = kfifo_in(&mq->fifo, (unsigned char *)&msg, sizeof(msg));
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WARN_ON(len != sizeof(msg));
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tasklet_schedule(&mbox->txq->tasklet);
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out:
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spin_unlock_bh(&mq->lock);
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return ret;
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}
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EXPORT_SYMBOL(omap_mbox_msg_send);
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void omap_mbox_save_ctx(struct omap_mbox *mbox)
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{
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int i;
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int nr_regs;
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if (mbox->intr_type)
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nr_regs = OMAP4_MBOX_NR_REGS;
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else
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nr_regs = MBOX_NR_REGS;
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for (i = 0; i < nr_regs; i++) {
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mbox->ctx[i] = mbox_read_reg(mbox->parent, i * sizeof(u32));
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dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__,
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i, mbox->ctx[i]);
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}
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}
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EXPORT_SYMBOL(omap_mbox_save_ctx);
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void omap_mbox_restore_ctx(struct omap_mbox *mbox)
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{
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int i;
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int nr_regs;
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if (mbox->intr_type)
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nr_regs = OMAP4_MBOX_NR_REGS;
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else
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nr_regs = MBOX_NR_REGS;
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for (i = 0; i < nr_regs; i++) {
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mbox_write_reg(mbox->parent, mbox->ctx[i], i * sizeof(u32));
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dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__,
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i, mbox->ctx[i]);
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}
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}
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EXPORT_SYMBOL(omap_mbox_restore_ctx);
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void omap_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
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{
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u32 l;
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struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
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&mbox->tx_fifo : &mbox->rx_fifo;
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u32 bit = fifo->intr_bit;
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u32 irqenable = fifo->irqenable;
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l = mbox_read_reg(mbox->parent, irqenable);
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l |= bit;
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mbox_write_reg(mbox->parent, l, irqenable);
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}
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EXPORT_SYMBOL(omap_mbox_enable_irq);
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void omap_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
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{
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struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
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&mbox->tx_fifo : &mbox->rx_fifo;
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u32 bit = fifo->intr_bit;
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u32 irqdisable = fifo->irqdisable;
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/*
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* Read and update the interrupt configuration register for pre-OMAP4.
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* OMAP4 and later SoCs have a dedicated interrupt disabling register.
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*/
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if (!mbox->intr_type)
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bit = mbox_read_reg(mbox->parent, irqdisable) & ~bit;
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mbox_write_reg(mbox->parent, bit, irqdisable);
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}
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EXPORT_SYMBOL(omap_mbox_disable_irq);
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static void mbox_tx_tasklet(unsigned long tx_data)
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{
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struct omap_mbox *mbox = (struct omap_mbox *)tx_data;
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struct omap_mbox_queue *mq = mbox->txq;
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mbox_msg_t msg;
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int ret;
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while (kfifo_len(&mq->fifo)) {
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if (mbox_fifo_full(mbox)) {
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omap_mbox_enable_irq(mbox, IRQ_TX);
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break;
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}
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ret = kfifo_out(&mq->fifo, (unsigned char *)&msg,
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sizeof(msg));
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WARN_ON(ret != sizeof(msg));
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mbox_fifo_write(mbox, msg);
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}
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}
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/*
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* Message receiver(workqueue)
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*/
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static void mbox_rx_work(struct work_struct *work)
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{
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struct omap_mbox_queue *mq =
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container_of(work, struct omap_mbox_queue, work);
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mbox_msg_t msg;
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int len;
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while (kfifo_len(&mq->fifo) >= sizeof(msg)) {
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len = kfifo_out(&mq->fifo, (unsigned char *)&msg, sizeof(msg));
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WARN_ON(len != sizeof(msg));
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blocking_notifier_call_chain(&mq->mbox->notifier, len,
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(void *)msg);
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spin_lock_irq(&mq->lock);
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if (mq->full) {
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mq->full = false;
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omap_mbox_enable_irq(mq->mbox, IRQ_RX);
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}
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spin_unlock_irq(&mq->lock);
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}
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}
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/*
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* Mailbox interrupt handler
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*/
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static void __mbox_tx_interrupt(struct omap_mbox *mbox)
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{
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omap_mbox_disable_irq(mbox, IRQ_TX);
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ack_mbox_irq(mbox, IRQ_TX);
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tasklet_schedule(&mbox->txq->tasklet);
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}
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static void __mbox_rx_interrupt(struct omap_mbox *mbox)
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{
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struct omap_mbox_queue *mq = mbox->rxq;
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mbox_msg_t msg;
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int len;
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while (!mbox_fifo_empty(mbox)) {
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if (unlikely(kfifo_avail(&mq->fifo) < sizeof(msg))) {
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omap_mbox_disable_irq(mbox, IRQ_RX);
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mq->full = true;
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goto nomem;
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}
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msg = mbox_fifo_read(mbox);
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len = kfifo_in(&mq->fifo, (unsigned char *)&msg, sizeof(msg));
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WARN_ON(len != sizeof(msg));
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}
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/* no more messages in the fifo. clear IRQ source. */
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ack_mbox_irq(mbox, IRQ_RX);
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nomem:
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schedule_work(&mbox->rxq->work);
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}
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static irqreturn_t mbox_interrupt(int irq, void *p)
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{
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struct omap_mbox *mbox = p;
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if (is_mbox_irq(mbox, IRQ_TX))
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__mbox_tx_interrupt(mbox);
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if (is_mbox_irq(mbox, IRQ_RX))
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__mbox_rx_interrupt(mbox);
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return IRQ_HANDLED;
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}
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|
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static struct omap_mbox_queue *mbox_queue_alloc(struct omap_mbox *mbox,
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void (*work) (struct work_struct *),
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void (*tasklet)(unsigned long))
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{
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struct omap_mbox_queue *mq;
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mq = kzalloc(sizeof(struct omap_mbox_queue), GFP_KERNEL);
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if (!mq)
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return NULL;
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spin_lock_init(&mq->lock);
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if (kfifo_alloc(&mq->fifo, mbox_kfifo_size, GFP_KERNEL))
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goto error;
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if (work)
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INIT_WORK(&mq->work, work);
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if (tasklet)
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tasklet_init(&mq->tasklet, tasklet, (unsigned long)mbox);
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return mq;
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error:
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kfree(mq);
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return NULL;
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}
|
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|
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static void mbox_queue_free(struct omap_mbox_queue *q)
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{
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kfifo_free(&q->fifo);
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kfree(q);
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}
|
|
|
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static int omap_mbox_startup(struct omap_mbox *mbox)
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{
|
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int ret = 0;
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struct omap_mbox_queue *mq;
|
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struct omap_mbox_device *mdev = mbox->parent;
|
|
|
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mutex_lock(&mdev->cfg_lock);
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ret = pm_runtime_get_sync(mdev->dev);
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if (unlikely(ret < 0))
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goto fail_startup;
|
|
|
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if (!mbox->use_count++) {
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mq = mbox_queue_alloc(mbox, NULL, mbox_tx_tasklet);
|
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if (!mq) {
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ret = -ENOMEM;
|
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goto fail_alloc_txq;
|
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}
|
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mbox->txq = mq;
|
|
|
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mq = mbox_queue_alloc(mbox, mbox_rx_work, NULL);
|
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if (!mq) {
|
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ret = -ENOMEM;
|
|
goto fail_alloc_rxq;
|
|
}
|
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mbox->rxq = mq;
|
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mq->mbox = mbox;
|
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ret = request_irq(mbox->irq, mbox_interrupt, IRQF_SHARED,
|
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mbox->name, mbox);
|
|
if (unlikely(ret)) {
|
|
pr_err("failed to register mailbox interrupt:%d\n",
|
|
ret);
|
|
goto fail_request_irq;
|
|
}
|
|
|
|
omap_mbox_enable_irq(mbox, IRQ_RX);
|
|
}
|
|
mutex_unlock(&mdev->cfg_lock);
|
|
return 0;
|
|
|
|
fail_request_irq:
|
|
mbox_queue_free(mbox->rxq);
|
|
fail_alloc_rxq:
|
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mbox_queue_free(mbox->txq);
|
|
fail_alloc_txq:
|
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pm_runtime_put_sync(mdev->dev);
|
|
mbox->use_count--;
|
|
fail_startup:
|
|
mutex_unlock(&mdev->cfg_lock);
|
|
return ret;
|
|
}
|
|
|
|
static void omap_mbox_fini(struct omap_mbox *mbox)
|
|
{
|
|
struct omap_mbox_device *mdev = mbox->parent;
|
|
|
|
mutex_lock(&mdev->cfg_lock);
|
|
|
|
if (!--mbox->use_count) {
|
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omap_mbox_disable_irq(mbox, IRQ_RX);
|
|
free_irq(mbox->irq, mbox);
|
|
tasklet_kill(&mbox->txq->tasklet);
|
|
flush_work(&mbox->rxq->work);
|
|
mbox_queue_free(mbox->txq);
|
|
mbox_queue_free(mbox->rxq);
|
|
}
|
|
|
|
pm_runtime_put_sync(mdev->dev);
|
|
|
|
mutex_unlock(&mdev->cfg_lock);
|
|
}
|
|
|
|
static struct omap_mbox *omap_mbox_device_find(struct omap_mbox_device *mdev,
|
|
const char *mbox_name)
|
|
{
|
|
struct omap_mbox *_mbox, *mbox = NULL;
|
|
struct omap_mbox **mboxes = mdev->mboxes;
|
|
int i;
|
|
|
|
if (!mboxes)
|
|
return NULL;
|
|
|
|
for (i = 0; (_mbox = mboxes[i]); i++) {
|
|
if (!strcmp(_mbox->name, mbox_name)) {
|
|
mbox = _mbox;
|
|
break;
|
|
}
|
|
}
|
|
return mbox;
|
|
}
|
|
|
|
struct omap_mbox *omap_mbox_get(const char *name, struct notifier_block *nb)
|
|
{
|
|
struct omap_mbox *mbox = NULL;
|
|
struct omap_mbox_device *mdev;
|
|
int ret;
|
|
|
|
mutex_lock(&omap_mbox_devices_lock);
|
|
list_for_each_entry(mdev, &omap_mbox_devices, elem) {
|
|
mbox = omap_mbox_device_find(mdev, name);
|
|
if (mbox)
|
|
break;
|
|
}
|
|
mutex_unlock(&omap_mbox_devices_lock);
|
|
|
|
if (!mbox)
|
|
return ERR_PTR(-ENOENT);
|
|
|
|
if (nb)
|
|
blocking_notifier_chain_register(&mbox->notifier, nb);
|
|
|
|
ret = omap_mbox_startup(mbox);
|
|
if (ret) {
|
|
blocking_notifier_chain_unregister(&mbox->notifier, nb);
|
|
return ERR_PTR(-ENODEV);
|
|
}
|
|
|
|
return mbox;
|
|
}
|
|
EXPORT_SYMBOL(omap_mbox_get);
|
|
|
|
void omap_mbox_put(struct omap_mbox *mbox, struct notifier_block *nb)
|
|
{
|
|
blocking_notifier_chain_unregister(&mbox->notifier, nb);
|
|
omap_mbox_fini(mbox);
|
|
}
|
|
EXPORT_SYMBOL(omap_mbox_put);
|
|
|
|
static struct class omap_mbox_class = { .name = "mbox", };
|
|
|
|
static int omap_mbox_register(struct omap_mbox_device *mdev)
|
|
{
|
|
int ret;
|
|
int i;
|
|
struct omap_mbox **mboxes;
|
|
|
|
if (!mdev || !mdev->mboxes)
|
|
return -EINVAL;
|
|
|
|
mboxes = mdev->mboxes;
|
|
for (i = 0; mboxes[i]; i++) {
|
|
struct omap_mbox *mbox = mboxes[i];
|
|
mbox->dev = device_create(&omap_mbox_class,
|
|
mdev->dev, 0, mbox, "%s", mbox->name);
|
|
if (IS_ERR(mbox->dev)) {
|
|
ret = PTR_ERR(mbox->dev);
|
|
goto err_out;
|
|
}
|
|
|
|
BLOCKING_INIT_NOTIFIER_HEAD(&mbox->notifier);
|
|
}
|
|
|
|
mutex_lock(&omap_mbox_devices_lock);
|
|
list_add(&mdev->elem, &omap_mbox_devices);
|
|
mutex_unlock(&omap_mbox_devices_lock);
|
|
|
|
return 0;
|
|
|
|
err_out:
|
|
while (i--)
|
|
device_unregister(mboxes[i]->dev);
|
|
return ret;
|
|
}
|
|
|
|
static int omap_mbox_unregister(struct omap_mbox_device *mdev)
|
|
{
|
|
int i;
|
|
struct omap_mbox **mboxes;
|
|
|
|
if (!mdev || !mdev->mboxes)
|
|
return -EINVAL;
|
|
|
|
mutex_lock(&omap_mbox_devices_lock);
|
|
list_del(&mdev->elem);
|
|
mutex_unlock(&omap_mbox_devices_lock);
|
|
|
|
mboxes = mdev->mboxes;
|
|
for (i = 0; mboxes[i]; i++)
|
|
device_unregister(mboxes[i]->dev);
|
|
return 0;
|
|
}
|
|
|
|
static int omap_mbox_probe(struct platform_device *pdev)
|
|
{
|
|
struct resource *mem;
|
|
int ret;
|
|
struct omap_mbox **list, *mbox, *mboxblk;
|
|
struct omap_mbox_pdata *pdata = pdev->dev.platform_data;
|
|
struct omap_mbox_dev_info *info;
|
|
struct omap_mbox_device *mdev;
|
|
struct omap_mbox_fifo *fifo;
|
|
u32 intr_type;
|
|
u32 l;
|
|
int i;
|
|
|
|
if (!pdata || !pdata->info_cnt || !pdata->info) {
|
|
pr_err("%s: platform not supported\n", __func__);
|
|
return -ENODEV;
|
|
}
|
|
|
|
mdev = devm_kzalloc(&pdev->dev, sizeof(*mdev), GFP_KERNEL);
|
|
if (!mdev)
|
|
return -ENOMEM;
|
|
|
|
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
mdev->mbox_base = devm_ioremap_resource(&pdev->dev, mem);
|
|
if (IS_ERR(mdev->mbox_base))
|
|
return PTR_ERR(mdev->mbox_base);
|
|
|
|
/* allocate one extra for marking end of list */
|
|
list = devm_kzalloc(&pdev->dev, (pdata->info_cnt + 1) * sizeof(*list),
|
|
GFP_KERNEL);
|
|
if (!list)
|
|
return -ENOMEM;
|
|
|
|
mboxblk = devm_kzalloc(&pdev->dev, pdata->info_cnt * sizeof(*mbox),
|
|
GFP_KERNEL);
|
|
if (!mboxblk)
|
|
return -ENOMEM;
|
|
|
|
info = pdata->info;
|
|
intr_type = pdata->intr_type;
|
|
mbox = mboxblk;
|
|
for (i = 0; i < pdata->info_cnt; i++, info++) {
|
|
fifo = &mbox->tx_fifo;
|
|
fifo->msg = MAILBOX_MESSAGE(info->tx_id);
|
|
fifo->fifo_stat = MAILBOX_FIFOSTATUS(info->tx_id);
|
|
fifo->intr_bit = MAILBOX_IRQ_NOTFULL(info->tx_id);
|
|
fifo->irqenable = MAILBOX_IRQENABLE(intr_type, info->usr_id);
|
|
fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, info->usr_id);
|
|
fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, info->usr_id);
|
|
|
|
fifo = &mbox->rx_fifo;
|
|
fifo->msg = MAILBOX_MESSAGE(info->rx_id);
|
|
fifo->msg_stat = MAILBOX_MSGSTATUS(info->rx_id);
|
|
fifo->intr_bit = MAILBOX_IRQ_NEWMSG(info->rx_id);
|
|
fifo->irqenable = MAILBOX_IRQENABLE(intr_type, info->usr_id);
|
|
fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, info->usr_id);
|
|
fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, info->usr_id);
|
|
|
|
mbox->intr_type = intr_type;
|
|
|
|
mbox->parent = mdev;
|
|
mbox->name = info->name;
|
|
mbox->irq = platform_get_irq(pdev, info->irq_id);
|
|
if (mbox->irq < 0)
|
|
return mbox->irq;
|
|
list[i] = mbox++;
|
|
}
|
|
|
|
mutex_init(&mdev->cfg_lock);
|
|
mdev->dev = &pdev->dev;
|
|
mdev->num_users = pdata->num_users;
|
|
mdev->num_fifos = pdata->num_fifos;
|
|
mdev->mboxes = list;
|
|
ret = omap_mbox_register(mdev);
|
|
if (ret)
|
|
return ret;
|
|
|
|
platform_set_drvdata(pdev, mdev);
|
|
pm_runtime_enable(mdev->dev);
|
|
|
|
ret = pm_runtime_get_sync(mdev->dev);
|
|
if (ret < 0) {
|
|
pm_runtime_put_noidle(mdev->dev);
|
|
goto unregister;
|
|
}
|
|
|
|
/*
|
|
* just print the raw revision register, the format is not
|
|
* uniform across all SoCs
|
|
*/
|
|
l = mbox_read_reg(mdev, MAILBOX_REVISION);
|
|
dev_info(mdev->dev, "omap mailbox rev 0x%x\n", l);
|
|
|
|
ret = pm_runtime_put_sync(mdev->dev);
|
|
if (ret < 0)
|
|
goto unregister;
|
|
|
|
return 0;
|
|
|
|
unregister:
|
|
pm_runtime_disable(mdev->dev);
|
|
omap_mbox_unregister(mdev);
|
|
return ret;
|
|
}
|
|
|
|
static int omap_mbox_remove(struct platform_device *pdev)
|
|
{
|
|
struct omap_mbox_device *mdev = platform_get_drvdata(pdev);
|
|
|
|
pm_runtime_disable(mdev->dev);
|
|
omap_mbox_unregister(mdev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver omap_mbox_driver = {
|
|
.probe = omap_mbox_probe,
|
|
.remove = omap_mbox_remove,
|
|
.driver = {
|
|
.name = "omap-mailbox",
|
|
.owner = THIS_MODULE,
|
|
},
|
|
};
|
|
|
|
static int __init omap_mbox_init(void)
|
|
{
|
|
int err;
|
|
|
|
err = class_register(&omap_mbox_class);
|
|
if (err)
|
|
return err;
|
|
|
|
/* kfifo size sanity check: alignment and minimal size */
|
|
mbox_kfifo_size = ALIGN(mbox_kfifo_size, sizeof(mbox_msg_t));
|
|
mbox_kfifo_size = max_t(unsigned int, mbox_kfifo_size,
|
|
sizeof(mbox_msg_t));
|
|
|
|
return platform_driver_register(&omap_mbox_driver);
|
|
}
|
|
subsys_initcall(omap_mbox_init);
|
|
|
|
static void __exit omap_mbox_exit(void)
|
|
{
|
|
platform_driver_unregister(&omap_mbox_driver);
|
|
class_unregister(&omap_mbox_class);
|
|
}
|
|
module_exit(omap_mbox_exit);
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_DESCRIPTION("omap mailbox: interrupt driven messaging");
|
|
MODULE_AUTHOR("Toshihiro Kobayashi");
|
|
MODULE_AUTHOR("Hiroshi DOYU");
|