962 lines
23 KiB
C
962 lines
23 KiB
C
/*
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* Copyright (C) 2016, Semihalf
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* Author: Tomasz Nowicki <tn@semihalf.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* This file implements early detection/parsing of I/O mapping
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* reported to OS through firmware via I/O Remapping Table (IORT)
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* IORT document number: ARM DEN 0049A
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*/
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#define pr_fmt(fmt) "ACPI: IORT: " fmt
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#include <linux/acpi_iort.h>
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#include <linux/iommu.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/pci.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#define IORT_TYPE_MASK(type) (1 << (type))
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#define IORT_MSI_TYPE (1 << ACPI_IORT_NODE_ITS_GROUP)
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#define IORT_IOMMU_TYPE ((1 << ACPI_IORT_NODE_SMMU) | \
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(1 << ACPI_IORT_NODE_SMMU_V3))
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struct iort_its_msi_chip {
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struct list_head list;
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struct fwnode_handle *fw_node;
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u32 translation_id;
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};
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struct iort_fwnode {
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struct list_head list;
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struct acpi_iort_node *iort_node;
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struct fwnode_handle *fwnode;
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};
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static LIST_HEAD(iort_fwnode_list);
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static DEFINE_SPINLOCK(iort_fwnode_lock);
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/**
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* iort_set_fwnode() - Create iort_fwnode and use it to register
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* iommu data in the iort_fwnode_list
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*
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* @node: IORT table node associated with the IOMMU
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* @fwnode: fwnode associated with the IORT node
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*
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* Returns: 0 on success
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* <0 on failure
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*/
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static inline int iort_set_fwnode(struct acpi_iort_node *iort_node,
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struct fwnode_handle *fwnode)
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{
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struct iort_fwnode *np;
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np = kzalloc(sizeof(struct iort_fwnode), GFP_ATOMIC);
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if (WARN_ON(!np))
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return -ENOMEM;
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INIT_LIST_HEAD(&np->list);
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np->iort_node = iort_node;
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np->fwnode = fwnode;
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spin_lock(&iort_fwnode_lock);
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list_add_tail(&np->list, &iort_fwnode_list);
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spin_unlock(&iort_fwnode_lock);
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return 0;
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}
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/**
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* iort_get_fwnode() - Retrieve fwnode associated with an IORT node
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*
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* @node: IORT table node to be looked-up
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*
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* Returns: fwnode_handle pointer on success, NULL on failure
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*/
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static inline
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struct fwnode_handle *iort_get_fwnode(struct acpi_iort_node *node)
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{
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struct iort_fwnode *curr;
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struct fwnode_handle *fwnode = NULL;
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spin_lock(&iort_fwnode_lock);
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list_for_each_entry(curr, &iort_fwnode_list, list) {
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if (curr->iort_node == node) {
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fwnode = curr->fwnode;
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break;
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}
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}
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spin_unlock(&iort_fwnode_lock);
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return fwnode;
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}
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/**
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* iort_delete_fwnode() - Delete fwnode associated with an IORT node
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*
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* @node: IORT table node associated with fwnode to delete
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*/
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static inline void iort_delete_fwnode(struct acpi_iort_node *node)
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{
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struct iort_fwnode *curr, *tmp;
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spin_lock(&iort_fwnode_lock);
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list_for_each_entry_safe(curr, tmp, &iort_fwnode_list, list) {
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if (curr->iort_node == node) {
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list_del(&curr->list);
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kfree(curr);
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break;
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}
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}
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spin_unlock(&iort_fwnode_lock);
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}
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typedef acpi_status (*iort_find_node_callback)
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(struct acpi_iort_node *node, void *context);
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/* Root pointer to the mapped IORT table */
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static struct acpi_table_header *iort_table;
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static LIST_HEAD(iort_msi_chip_list);
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static DEFINE_SPINLOCK(iort_msi_chip_lock);
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/**
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* iort_register_domain_token() - register domain token and related ITS ID
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* to the list from where we can get it back later on.
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* @trans_id: ITS ID.
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* @fw_node: Domain token.
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*
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* Returns: 0 on success, -ENOMEM if no memory when allocating list element
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*/
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int iort_register_domain_token(int trans_id, struct fwnode_handle *fw_node)
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{
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struct iort_its_msi_chip *its_msi_chip;
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its_msi_chip = kzalloc(sizeof(*its_msi_chip), GFP_KERNEL);
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if (!its_msi_chip)
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return -ENOMEM;
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its_msi_chip->fw_node = fw_node;
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its_msi_chip->translation_id = trans_id;
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spin_lock(&iort_msi_chip_lock);
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list_add(&its_msi_chip->list, &iort_msi_chip_list);
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spin_unlock(&iort_msi_chip_lock);
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return 0;
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}
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/**
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* iort_deregister_domain_token() - Deregister domain token based on ITS ID
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* @trans_id: ITS ID.
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*
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* Returns: none.
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*/
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void iort_deregister_domain_token(int trans_id)
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{
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struct iort_its_msi_chip *its_msi_chip, *t;
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spin_lock(&iort_msi_chip_lock);
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list_for_each_entry_safe(its_msi_chip, t, &iort_msi_chip_list, list) {
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if (its_msi_chip->translation_id == trans_id) {
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list_del(&its_msi_chip->list);
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kfree(its_msi_chip);
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break;
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}
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}
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spin_unlock(&iort_msi_chip_lock);
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}
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/**
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* iort_find_domain_token() - Find domain token based on given ITS ID
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* @trans_id: ITS ID.
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*
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* Returns: domain token when find on the list, NULL otherwise
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*/
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struct fwnode_handle *iort_find_domain_token(int trans_id)
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{
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struct fwnode_handle *fw_node = NULL;
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struct iort_its_msi_chip *its_msi_chip;
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spin_lock(&iort_msi_chip_lock);
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list_for_each_entry(its_msi_chip, &iort_msi_chip_list, list) {
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if (its_msi_chip->translation_id == trans_id) {
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fw_node = its_msi_chip->fw_node;
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break;
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}
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}
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spin_unlock(&iort_msi_chip_lock);
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return fw_node;
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}
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static struct acpi_iort_node *iort_scan_node(enum acpi_iort_node_type type,
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iort_find_node_callback callback,
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void *context)
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{
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struct acpi_iort_node *iort_node, *iort_end;
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struct acpi_table_iort *iort;
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int i;
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if (!iort_table)
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return NULL;
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/* Get the first IORT node */
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iort = (struct acpi_table_iort *)iort_table;
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iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort,
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iort->node_offset);
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iort_end = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
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iort_table->length);
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for (i = 0; i < iort->node_count; i++) {
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if (WARN_TAINT(iort_node >= iort_end, TAINT_FIRMWARE_WORKAROUND,
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"IORT node pointer overflows, bad table!\n"))
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return NULL;
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if (iort_node->type == type &&
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ACPI_SUCCESS(callback(iort_node, context)))
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return iort_node;
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iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort_node,
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iort_node->length);
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}
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return NULL;
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}
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static acpi_status
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iort_match_type_callback(struct acpi_iort_node *node, void *context)
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{
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return AE_OK;
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}
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bool iort_node_match(u8 type)
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{
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struct acpi_iort_node *node;
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node = iort_scan_node(type, iort_match_type_callback, NULL);
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return node != NULL;
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}
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static acpi_status iort_match_node_callback(struct acpi_iort_node *node,
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void *context)
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{
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struct device *dev = context;
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acpi_status status;
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if (node->type == ACPI_IORT_NODE_NAMED_COMPONENT) {
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struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
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struct acpi_device *adev = to_acpi_device_node(dev->fwnode);
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struct acpi_iort_named_component *ncomp;
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if (!adev) {
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status = AE_NOT_FOUND;
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goto out;
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}
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status = acpi_get_name(adev->handle, ACPI_FULL_PATHNAME, &buf);
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if (ACPI_FAILURE(status)) {
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dev_warn(dev, "Can't get device full path name\n");
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goto out;
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}
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ncomp = (struct acpi_iort_named_component *)node->node_data;
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status = !strcmp(ncomp->device_name, buf.pointer) ?
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AE_OK : AE_NOT_FOUND;
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acpi_os_free(buf.pointer);
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} else if (node->type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) {
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struct acpi_iort_root_complex *pci_rc;
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struct pci_bus *bus;
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bus = to_pci_bus(dev);
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pci_rc = (struct acpi_iort_root_complex *)node->node_data;
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/*
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* It is assumed that PCI segment numbers maps one-to-one
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* with root complexes. Each segment number can represent only
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* one root complex.
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*/
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status = pci_rc->pci_segment_number == pci_domain_nr(bus) ?
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AE_OK : AE_NOT_FOUND;
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} else {
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status = AE_NOT_FOUND;
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}
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out:
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return status;
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}
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static int iort_id_map(struct acpi_iort_id_mapping *map, u8 type, u32 rid_in,
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u32 *rid_out)
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{
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/* Single mapping does not care for input id */
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if (map->flags & ACPI_IORT_ID_SINGLE_MAPPING) {
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if (type == ACPI_IORT_NODE_NAMED_COMPONENT ||
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type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) {
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*rid_out = map->output_base;
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return 0;
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}
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pr_warn(FW_BUG "[map %p] SINGLE MAPPING flag not allowed for node type %d, skipping ID map\n",
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map, type);
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return -ENXIO;
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}
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if (rid_in < map->input_base ||
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(rid_in >= map->input_base + map->id_count))
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return -ENXIO;
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*rid_out = map->output_base + (rid_in - map->input_base);
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return 0;
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}
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static
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struct acpi_iort_node *iort_node_get_id(struct acpi_iort_node *node,
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u32 *id_out, u8 type_mask,
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int index)
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{
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struct acpi_iort_node *parent;
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struct acpi_iort_id_mapping *map;
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if (!node->mapping_offset || !node->mapping_count ||
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index >= node->mapping_count)
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return NULL;
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map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node,
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node->mapping_offset + index * sizeof(*map));
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/* Firmware bug! */
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if (!map->output_reference) {
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pr_err(FW_BUG "[node %p type %d] ID map has NULL parent reference\n",
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node, node->type);
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return NULL;
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}
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parent = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
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map->output_reference);
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if (!(IORT_TYPE_MASK(parent->type) & type_mask))
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return NULL;
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if (map->flags & ACPI_IORT_ID_SINGLE_MAPPING) {
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if (node->type == ACPI_IORT_NODE_NAMED_COMPONENT ||
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node->type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) {
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*id_out = map->output_base;
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return parent;
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}
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}
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return NULL;
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}
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static struct acpi_iort_node *iort_node_map_rid(struct acpi_iort_node *node,
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u32 rid_in, u32 *rid_out,
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u8 type_mask)
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{
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u32 rid = rid_in;
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/* Parse the ID mapping tree to find specified node type */
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while (node) {
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struct acpi_iort_id_mapping *map;
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int i;
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if (IORT_TYPE_MASK(node->type) & type_mask) {
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if (rid_out)
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*rid_out = rid;
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return node;
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}
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if (!node->mapping_offset || !node->mapping_count)
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goto fail_map;
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map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node,
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node->mapping_offset);
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/* Firmware bug! */
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if (!map->output_reference) {
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pr_err(FW_BUG "[node %p type %d] ID map has NULL parent reference\n",
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node, node->type);
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goto fail_map;
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}
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/* Do the RID translation */
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for (i = 0; i < node->mapping_count; i++, map++) {
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if (!iort_id_map(map, node->type, rid, &rid))
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break;
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}
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if (i == node->mapping_count)
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goto fail_map;
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node = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
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map->output_reference);
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}
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fail_map:
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/* Map input RID to output RID unchanged on mapping failure*/
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if (rid_out)
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*rid_out = rid_in;
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return NULL;
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}
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static struct acpi_iort_node *iort_find_dev_node(struct device *dev)
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{
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struct pci_bus *pbus;
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if (!dev_is_pci(dev))
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return iort_scan_node(ACPI_IORT_NODE_NAMED_COMPONENT,
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iort_match_node_callback, dev);
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|
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/* Find a PCI root bus */
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pbus = to_pci_dev(dev)->bus;
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while (!pci_is_root_bus(pbus))
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pbus = pbus->parent;
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return iort_scan_node(ACPI_IORT_NODE_PCI_ROOT_COMPLEX,
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iort_match_node_callback, &pbus->dev);
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}
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/**
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* iort_msi_map_rid() - Map a MSI requester ID for a device
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* @dev: The device for which the mapping is to be done.
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* @req_id: The device requester ID.
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*
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* Returns: mapped MSI RID on success, input requester ID otherwise
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*/
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u32 iort_msi_map_rid(struct device *dev, u32 req_id)
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{
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struct acpi_iort_node *node;
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u32 dev_id;
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|
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node = iort_find_dev_node(dev);
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if (!node)
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return req_id;
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iort_node_map_rid(node, req_id, &dev_id, IORT_MSI_TYPE);
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return dev_id;
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}
|
|
|
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/**
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* iort_dev_find_its_id() - Find the ITS identifier for a device
|
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* @dev: The device.
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* @idx: Index of the ITS identifier list.
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* @its_id: ITS identifier.
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*
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* Returns: 0 on success, appropriate error value otherwise
|
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*/
|
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static int iort_dev_find_its_id(struct device *dev, u32 req_id,
|
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unsigned int idx, int *its_id)
|
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{
|
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struct acpi_iort_its_group *its;
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struct acpi_iort_node *node;
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node = iort_find_dev_node(dev);
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if (!node)
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return -ENXIO;
|
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|
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node = iort_node_map_rid(node, req_id, NULL, IORT_MSI_TYPE);
|
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if (!node)
|
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return -ENXIO;
|
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|
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/* Move to ITS specific data */
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its = (struct acpi_iort_its_group *)node->node_data;
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if (idx > its->its_count) {
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dev_err(dev, "requested ITS ID index [%d] is greater than available [%d]\n",
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idx, its->its_count);
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return -ENXIO;
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}
|
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|
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*its_id = its->identifiers[idx];
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return 0;
|
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}
|
|
|
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/**
|
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* iort_get_device_domain() - Find MSI domain related to a device
|
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* @dev: The device.
|
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* @req_id: Requester ID for the device.
|
|
*
|
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* Returns: the MSI domain for this device, NULL otherwise
|
|
*/
|
|
struct irq_domain *iort_get_device_domain(struct device *dev, u32 req_id)
|
|
{
|
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struct fwnode_handle *handle;
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int its_id;
|
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|
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if (iort_dev_find_its_id(dev, req_id, 0, &its_id))
|
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return NULL;
|
|
|
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handle = iort_find_domain_token(its_id);
|
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if (!handle)
|
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return NULL;
|
|
|
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return irq_find_matching_fwnode(handle, DOMAIN_BUS_PCI_MSI);
|
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}
|
|
|
|
static int __get_pci_rid(struct pci_dev *pdev, u16 alias, void *data)
|
|
{
|
|
u32 *rid = data;
|
|
|
|
*rid = alias;
|
|
return 0;
|
|
}
|
|
|
|
static int arm_smmu_iort_xlate(struct device *dev, u32 streamid,
|
|
struct fwnode_handle *fwnode,
|
|
const struct iommu_ops *ops)
|
|
{
|
|
int ret = iommu_fwspec_init(dev, fwnode, ops);
|
|
|
|
if (!ret)
|
|
ret = iommu_fwspec_add_ids(dev, &streamid, 1);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static const struct iommu_ops *iort_iommu_xlate(struct device *dev,
|
|
struct acpi_iort_node *node,
|
|
u32 streamid)
|
|
{
|
|
const struct iommu_ops *ops = NULL;
|
|
int ret = -ENODEV;
|
|
struct fwnode_handle *iort_fwnode;
|
|
|
|
if (node) {
|
|
iort_fwnode = iort_get_fwnode(node);
|
|
if (!iort_fwnode)
|
|
return NULL;
|
|
|
|
ops = iommu_ops_from_fwnode(iort_fwnode);
|
|
if (!ops)
|
|
return NULL;
|
|
|
|
ret = arm_smmu_iort_xlate(dev, streamid, iort_fwnode, ops);
|
|
}
|
|
|
|
return ret ? NULL : ops;
|
|
}
|
|
|
|
/**
|
|
* iort_set_dma_mask - Set-up dma mask for a device.
|
|
*
|
|
* @dev: device to configure
|
|
*/
|
|
void iort_set_dma_mask(struct device *dev)
|
|
{
|
|
/*
|
|
* Set default coherent_dma_mask to 32 bit. Drivers are expected to
|
|
* setup the correct supported mask.
|
|
*/
|
|
if (!dev->coherent_dma_mask)
|
|
dev->coherent_dma_mask = DMA_BIT_MASK(32);
|
|
|
|
/*
|
|
* Set it to coherent_dma_mask by default if the architecture
|
|
* code has not set it.
|
|
*/
|
|
if (!dev->dma_mask)
|
|
dev->dma_mask = &dev->coherent_dma_mask;
|
|
}
|
|
|
|
/**
|
|
* iort_iommu_configure - Set-up IOMMU configuration for a device.
|
|
*
|
|
* @dev: device to configure
|
|
*
|
|
* Returns: iommu_ops pointer on configuration success
|
|
* NULL on configuration failure
|
|
*/
|
|
const struct iommu_ops *iort_iommu_configure(struct device *dev)
|
|
{
|
|
struct acpi_iort_node *node, *parent;
|
|
const struct iommu_ops *ops = NULL;
|
|
u32 streamid = 0;
|
|
|
|
if (dev_is_pci(dev)) {
|
|
struct pci_bus *bus = to_pci_dev(dev)->bus;
|
|
u32 rid;
|
|
|
|
pci_for_each_dma_alias(to_pci_dev(dev), __get_pci_rid,
|
|
&rid);
|
|
|
|
node = iort_scan_node(ACPI_IORT_NODE_PCI_ROOT_COMPLEX,
|
|
iort_match_node_callback, &bus->dev);
|
|
if (!node)
|
|
return NULL;
|
|
|
|
parent = iort_node_map_rid(node, rid, &streamid,
|
|
IORT_IOMMU_TYPE);
|
|
|
|
ops = iort_iommu_xlate(dev, parent, streamid);
|
|
|
|
} else {
|
|
int i = 0;
|
|
|
|
node = iort_scan_node(ACPI_IORT_NODE_NAMED_COMPONENT,
|
|
iort_match_node_callback, dev);
|
|
if (!node)
|
|
return NULL;
|
|
|
|
parent = iort_node_get_id(node, &streamid,
|
|
IORT_IOMMU_TYPE, i++);
|
|
|
|
while (parent) {
|
|
ops = iort_iommu_xlate(dev, parent, streamid);
|
|
|
|
parent = iort_node_get_id(node, &streamid,
|
|
IORT_IOMMU_TYPE, i++);
|
|
}
|
|
}
|
|
|
|
return ops;
|
|
}
|
|
|
|
static void __init acpi_iort_register_irq(int hwirq, const char *name,
|
|
int trigger,
|
|
struct resource *res)
|
|
{
|
|
int irq = acpi_register_gsi(NULL, hwirq, trigger,
|
|
ACPI_ACTIVE_HIGH);
|
|
|
|
if (irq <= 0) {
|
|
pr_err("could not register gsi hwirq %d name [%s]\n", hwirq,
|
|
name);
|
|
return;
|
|
}
|
|
|
|
res->start = irq;
|
|
res->end = irq;
|
|
res->flags = IORESOURCE_IRQ;
|
|
res->name = name;
|
|
}
|
|
|
|
static int __init arm_smmu_v3_count_resources(struct acpi_iort_node *node)
|
|
{
|
|
struct acpi_iort_smmu_v3 *smmu;
|
|
/* Always present mem resource */
|
|
int num_res = 1;
|
|
|
|
/* Retrieve SMMUv3 specific data */
|
|
smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
|
|
|
|
if (smmu->event_gsiv)
|
|
num_res++;
|
|
|
|
if (smmu->pri_gsiv)
|
|
num_res++;
|
|
|
|
if (smmu->gerr_gsiv)
|
|
num_res++;
|
|
|
|
if (smmu->sync_gsiv)
|
|
num_res++;
|
|
|
|
return num_res;
|
|
}
|
|
|
|
static void __init arm_smmu_v3_init_resources(struct resource *res,
|
|
struct acpi_iort_node *node)
|
|
{
|
|
struct acpi_iort_smmu_v3 *smmu;
|
|
int num_res = 0;
|
|
|
|
/* Retrieve SMMUv3 specific data */
|
|
smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
|
|
|
|
res[num_res].start = smmu->base_address;
|
|
res[num_res].end = smmu->base_address + SZ_128K - 1;
|
|
res[num_res].flags = IORESOURCE_MEM;
|
|
|
|
num_res++;
|
|
|
|
if (smmu->event_gsiv)
|
|
acpi_iort_register_irq(smmu->event_gsiv, "eventq",
|
|
ACPI_EDGE_SENSITIVE,
|
|
&res[num_res++]);
|
|
|
|
if (smmu->pri_gsiv)
|
|
acpi_iort_register_irq(smmu->pri_gsiv, "priq",
|
|
ACPI_EDGE_SENSITIVE,
|
|
&res[num_res++]);
|
|
|
|
if (smmu->gerr_gsiv)
|
|
acpi_iort_register_irq(smmu->gerr_gsiv, "gerror",
|
|
ACPI_EDGE_SENSITIVE,
|
|
&res[num_res++]);
|
|
|
|
if (smmu->sync_gsiv)
|
|
acpi_iort_register_irq(smmu->sync_gsiv, "cmdq-sync",
|
|
ACPI_EDGE_SENSITIVE,
|
|
&res[num_res++]);
|
|
}
|
|
|
|
static bool __init arm_smmu_v3_is_coherent(struct acpi_iort_node *node)
|
|
{
|
|
struct acpi_iort_smmu_v3 *smmu;
|
|
|
|
/* Retrieve SMMUv3 specific data */
|
|
smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
|
|
|
|
return smmu->flags & ACPI_IORT_SMMU_V3_COHACC_OVERRIDE;
|
|
}
|
|
|
|
static int __init arm_smmu_count_resources(struct acpi_iort_node *node)
|
|
{
|
|
struct acpi_iort_smmu *smmu;
|
|
|
|
/* Retrieve SMMU specific data */
|
|
smmu = (struct acpi_iort_smmu *)node->node_data;
|
|
|
|
/*
|
|
* Only consider the global fault interrupt and ignore the
|
|
* configuration access interrupt.
|
|
*
|
|
* MMIO address and global fault interrupt resources are always
|
|
* present so add them to the context interrupt count as a static
|
|
* value.
|
|
*/
|
|
return smmu->context_interrupt_count + 2;
|
|
}
|
|
|
|
static void __init arm_smmu_init_resources(struct resource *res,
|
|
struct acpi_iort_node *node)
|
|
{
|
|
struct acpi_iort_smmu *smmu;
|
|
int i, hw_irq, trigger, num_res = 0;
|
|
u64 *ctx_irq, *glb_irq;
|
|
|
|
/* Retrieve SMMU specific data */
|
|
smmu = (struct acpi_iort_smmu *)node->node_data;
|
|
|
|
res[num_res].start = smmu->base_address;
|
|
res[num_res].end = smmu->base_address + smmu->span - 1;
|
|
res[num_res].flags = IORESOURCE_MEM;
|
|
num_res++;
|
|
|
|
glb_irq = ACPI_ADD_PTR(u64, node, smmu->global_interrupt_offset);
|
|
/* Global IRQs */
|
|
hw_irq = IORT_IRQ_MASK(glb_irq[0]);
|
|
trigger = IORT_IRQ_TRIGGER_MASK(glb_irq[0]);
|
|
|
|
acpi_iort_register_irq(hw_irq, "arm-smmu-global", trigger,
|
|
&res[num_res++]);
|
|
|
|
/* Context IRQs */
|
|
ctx_irq = ACPI_ADD_PTR(u64, node, smmu->context_interrupt_offset);
|
|
for (i = 0; i < smmu->context_interrupt_count; i++) {
|
|
hw_irq = IORT_IRQ_MASK(ctx_irq[i]);
|
|
trigger = IORT_IRQ_TRIGGER_MASK(ctx_irq[i]);
|
|
|
|
acpi_iort_register_irq(hw_irq, "arm-smmu-context", trigger,
|
|
&res[num_res++]);
|
|
}
|
|
}
|
|
|
|
static bool __init arm_smmu_is_coherent(struct acpi_iort_node *node)
|
|
{
|
|
struct acpi_iort_smmu *smmu;
|
|
|
|
/* Retrieve SMMU specific data */
|
|
smmu = (struct acpi_iort_smmu *)node->node_data;
|
|
|
|
return smmu->flags & ACPI_IORT_SMMU_COHERENT_WALK;
|
|
}
|
|
|
|
struct iort_iommu_config {
|
|
const char *name;
|
|
int (*iommu_init)(struct acpi_iort_node *node);
|
|
bool (*iommu_is_coherent)(struct acpi_iort_node *node);
|
|
int (*iommu_count_resources)(struct acpi_iort_node *node);
|
|
void (*iommu_init_resources)(struct resource *res,
|
|
struct acpi_iort_node *node);
|
|
};
|
|
|
|
static const struct iort_iommu_config iort_arm_smmu_v3_cfg __initconst = {
|
|
.name = "arm-smmu-v3",
|
|
.iommu_is_coherent = arm_smmu_v3_is_coherent,
|
|
.iommu_count_resources = arm_smmu_v3_count_resources,
|
|
.iommu_init_resources = arm_smmu_v3_init_resources
|
|
};
|
|
|
|
static const struct iort_iommu_config iort_arm_smmu_cfg __initconst = {
|
|
.name = "arm-smmu",
|
|
.iommu_is_coherent = arm_smmu_is_coherent,
|
|
.iommu_count_resources = arm_smmu_count_resources,
|
|
.iommu_init_resources = arm_smmu_init_resources
|
|
};
|
|
|
|
static __init
|
|
const struct iort_iommu_config *iort_get_iommu_cfg(struct acpi_iort_node *node)
|
|
{
|
|
switch (node->type) {
|
|
case ACPI_IORT_NODE_SMMU_V3:
|
|
return &iort_arm_smmu_v3_cfg;
|
|
case ACPI_IORT_NODE_SMMU:
|
|
return &iort_arm_smmu_cfg;
|
|
default:
|
|
return NULL;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* iort_add_smmu_platform_device() - Allocate a platform device for SMMU
|
|
* @node: Pointer to SMMU ACPI IORT node
|
|
*
|
|
* Returns: 0 on success, <0 failure
|
|
*/
|
|
static int __init iort_add_smmu_platform_device(struct acpi_iort_node *node)
|
|
{
|
|
struct fwnode_handle *fwnode;
|
|
struct platform_device *pdev;
|
|
struct resource *r;
|
|
enum dev_dma_attr attr;
|
|
int ret, count;
|
|
const struct iort_iommu_config *ops = iort_get_iommu_cfg(node);
|
|
|
|
if (!ops)
|
|
return -ENODEV;
|
|
|
|
pdev = platform_device_alloc(ops->name, PLATFORM_DEVID_AUTO);
|
|
if (!pdev)
|
|
return -ENOMEM;
|
|
|
|
count = ops->iommu_count_resources(node);
|
|
|
|
r = kcalloc(count, sizeof(*r), GFP_KERNEL);
|
|
if (!r) {
|
|
ret = -ENOMEM;
|
|
goto dev_put;
|
|
}
|
|
|
|
ops->iommu_init_resources(r, node);
|
|
|
|
ret = platform_device_add_resources(pdev, r, count);
|
|
/*
|
|
* Resources are duplicated in platform_device_add_resources,
|
|
* free their allocated memory
|
|
*/
|
|
kfree(r);
|
|
|
|
if (ret)
|
|
goto dev_put;
|
|
|
|
/*
|
|
* Add a copy of IORT node pointer to platform_data to
|
|
* be used to retrieve IORT data information.
|
|
*/
|
|
ret = platform_device_add_data(pdev, &node, sizeof(node));
|
|
if (ret)
|
|
goto dev_put;
|
|
|
|
/*
|
|
* We expect the dma masks to be equivalent for
|
|
* all SMMUs set-ups
|
|
*/
|
|
pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
|
|
|
|
fwnode = iort_get_fwnode(node);
|
|
|
|
if (!fwnode) {
|
|
ret = -ENODEV;
|
|
goto dev_put;
|
|
}
|
|
|
|
pdev->dev.fwnode = fwnode;
|
|
|
|
attr = ops->iommu_is_coherent(node) ?
|
|
DEV_DMA_COHERENT : DEV_DMA_NON_COHERENT;
|
|
|
|
/* Configure DMA for the page table walker */
|
|
acpi_dma_configure(&pdev->dev, attr);
|
|
|
|
ret = platform_device_add(pdev);
|
|
if (ret)
|
|
goto dma_deconfigure;
|
|
|
|
return 0;
|
|
|
|
dma_deconfigure:
|
|
acpi_dma_deconfigure(&pdev->dev);
|
|
dev_put:
|
|
platform_device_put(pdev);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void __init iort_init_platform_devices(void)
|
|
{
|
|
struct acpi_iort_node *iort_node, *iort_end;
|
|
struct acpi_table_iort *iort;
|
|
struct fwnode_handle *fwnode;
|
|
int i, ret;
|
|
|
|
/*
|
|
* iort_table and iort both point to the start of IORT table, but
|
|
* have different struct types
|
|
*/
|
|
iort = (struct acpi_table_iort *)iort_table;
|
|
|
|
/* Get the first IORT node */
|
|
iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort,
|
|
iort->node_offset);
|
|
iort_end = ACPI_ADD_PTR(struct acpi_iort_node, iort,
|
|
iort_table->length);
|
|
|
|
for (i = 0; i < iort->node_count; i++) {
|
|
if (iort_node >= iort_end) {
|
|
pr_err("iort node pointer overflows, bad table\n");
|
|
return;
|
|
}
|
|
|
|
if ((iort_node->type == ACPI_IORT_NODE_SMMU) ||
|
|
(iort_node->type == ACPI_IORT_NODE_SMMU_V3)) {
|
|
|
|
fwnode = acpi_alloc_fwnode_static();
|
|
if (!fwnode)
|
|
return;
|
|
|
|
iort_set_fwnode(iort_node, fwnode);
|
|
|
|
ret = iort_add_smmu_platform_device(iort_node);
|
|
if (ret) {
|
|
iort_delete_fwnode(iort_node);
|
|
acpi_free_fwnode_static(fwnode);
|
|
return;
|
|
}
|
|
}
|
|
|
|
iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort_node,
|
|
iort_node->length);
|
|
}
|
|
}
|
|
|
|
void __init acpi_iort_init(void)
|
|
{
|
|
acpi_status status;
|
|
|
|
status = acpi_get_table(ACPI_SIG_IORT, 0, &iort_table);
|
|
if (ACPI_FAILURE(status)) {
|
|
if (status != AE_NOT_FOUND) {
|
|
const char *msg = acpi_format_exception(status);
|
|
|
|
pr_err("Failed to get table, %s\n", msg);
|
|
}
|
|
|
|
return;
|
|
}
|
|
|
|
iort_init_platform_devices();
|
|
|
|
acpi_probe_device_table(iort);
|
|
}
|