79 lines
1.9 KiB
C
79 lines
1.9 KiB
C
/*
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* intc-simr.c
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*
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* Interrupt controller code for the ColdFire 5208, 5207 & 532x parts.
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*
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* (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive
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* for more details.
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include <asm/traps.h>
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static void intc_irq_mask(unsigned int irq)
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{
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if (irq >= MCFINT_VECBASE) {
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if (irq < MCFINT_VECBASE + 64)
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__raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_SIMR);
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else if ((irq < MCFINT_VECBASE + 128) && MCFINTC1_SIMR)
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__raw_writeb(irq - MCFINT_VECBASE - 64, MCFINTC1_SIMR);
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}
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}
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static void intc_irq_unmask(unsigned int irq)
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{
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if (irq >= MCFINT_VECBASE) {
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if (irq < MCFINT_VECBASE + 64)
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__raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_CIMR);
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else if ((irq < MCFINT_VECBASE + 128) && MCFINTC1_CIMR)
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__raw_writeb(irq - MCFINT_VECBASE - 64, MCFINTC1_CIMR);
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}
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}
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static int intc_irq_set_type(unsigned int irq, unsigned int type)
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{
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if (irq >= MCFINT_VECBASE) {
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if (irq < MCFINT_VECBASE + 64)
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__raw_writeb(5, MCFINTC0_ICR0 + irq - MCFINT_VECBASE);
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else if ((irq < MCFINT_VECBASE) && MCFINTC1_ICR0)
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__raw_writeb(5, MCFINTC1_ICR0 + irq - MCFINT_VECBASE - 64);
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}
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return 0;
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}
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static struct irq_chip intc_irq_chip = {
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.name = "CF-INTC",
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.mask = intc_irq_mask,
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.unmask = intc_irq_unmask,
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.set_type = intc_irq_set_type,
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};
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void __init init_IRQ(void)
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{
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int irq;
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init_vectors();
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/* Mask all interrupt sources */
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__raw_writeb(0xff, MCFINTC0_SIMR);
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if (MCFINTC1_SIMR)
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__raw_writeb(0xff, MCFINTC1_SIMR);
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for (irq = 0; (irq < NR_IRQS); irq++) {
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set_irq_chip(irq, &intc_irq_chip);
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set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
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set_irq_handler(irq, handle_level_irq);
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}
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}
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