58 lines
1.7 KiB
Plaintext
58 lines
1.7 KiB
Plaintext
Device-tree bindings for the VPU found in Allwinner SoCs, referred to as the
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Video Engine (VE) in Allwinner literature.
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The VPU can only access the first 256 MiB of DRAM, that are DMA-mapped starting
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from the DRAM base. This requires specific memory allocation and handling.
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Required properties:
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- compatible : must be one of the following compatibles:
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- "allwinner,sun4i-a10-video-engine"
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- "allwinner,sun5i-a13-video-engine"
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- "allwinner,sun7i-a20-video-engine"
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- "allwinner,sun8i-a33-video-engine"
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- "allwinner,sun8i-h3-video-engine"
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- "allwinner,sun50i-a64-video-engine"
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- "allwinner,sun50i-h5-video-engine"
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- "allwinner,sun50i-h6-video-engine"
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- reg : register base and length of VE;
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- clocks : list of clock specifiers, corresponding to entries in
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the clock-names property;
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- clock-names : should contain "ahb", "mod" and "ram" entries;
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- resets : phandle for reset;
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- interrupts : VE interrupt number;
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- allwinner,sram : SRAM region to use with the VE.
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Optional properties:
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- memory-region : CMA pool to use for buffers allocation instead of the
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default CMA pool.
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Example:
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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/* Address must be kept in the lower 256 MiBs of DRAM for VE. */
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cma_pool: default-pool {
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compatible = "shared-dma-pool";
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size = <0x6000000>;
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alloc-ranges = <0x4a000000 0x6000000>;
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reusable;
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linux,cma-default;
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};
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};
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video-codec@1c0e000 {
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compatible = "allwinner,sun7i-a20-video-engine";
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reg = <0x01c0e000 0x1000>;
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clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>,
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<&ccu CLK_DRAM_VE>;
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clock-names = "ahb", "mod", "ram";
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resets = <&ccu RST_VE>;
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interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
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allwinner,sram = <&ve_sram 1>;
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};
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